drm/i915: Extend icl_sanitize_encoder_pll_mapping() to all DDI platforms
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 24 Feb 2021 14:42:14 +0000 (16:42 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Mon, 8 Mar 2021 16:39:54 +0000 (18:39 +0200)
Now that all the encoder clock stuff is uniformly abstracted
for all hsw+ platforms, let's extend icl_sanitize_encoder_pll_mapping()
to cover all of them.

Not sure there is a particular benefit in doing so, but less special
cases always makes me happy.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210224144214.24803-7-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
drivers/gpu/drm/i915/display/intel_ddi.c
drivers/gpu/drm/i915/display/intel_ddi.h
drivers/gpu/drm/i915/display/intel_display.c

index 59f105c..ba83682 100644 (file)
@@ -2133,7 +2133,7 @@ static void intel_ddi_disable_clock(struct intel_encoder *encoder)
                encoder->disable_clock(encoder);
 }
 
-void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
+void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
 {
        struct drm_i915_private *i915 = to_i915(encoder->base.dev);
        u32 port_mask;
index 99cebbe..59c6b01 100644 (file)
@@ -66,6 +66,6 @@ u32 ddi_signal_levels(struct intel_dp *intel_dp,
 int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
                               enum transcoder cpu_transcoder,
                               bool enable, u32 hdcp_mask);
-void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
+void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
 
 #endif /* __INTEL_DDI_H__ */
index 18d7f7a..f4bf81f 100644 (file)
@@ -13146,8 +13146,8 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
        /* notify opregion of the sanitized encoder state */
        intel_opregion_notify_encoder(encoder, connector && has_active_crtc);
 
-       if (INTEL_GEN(dev_priv) >= 11)
-               icl_sanitize_encoder_pll_mapping(encoder);
+       if (HAS_DDI(dev_priv))
+               intel_ddi_sanitize_encoder_pll_mapping(encoder);
 }
 
 /* FIXME read out full plane state for all planes */