[WebAssembly] Fix stack offsets of return values from call lowering.
authorJatin Bhateja <jatin.bhateja@gmail.com>
Fri, 10 Nov 2017 16:26:04 +0000 (16:26 +0000)
committerJatin Bhateja <jatin.bhateja@gmail.com>
Fri, 10 Nov 2017 16:26:04 +0000 (16:26 +0000)
Summary: Fixes PR35220

Reviewers: vadimcn, alexcrichton

Reviewed By: alexcrichton

Subscribers: pepyakin, alexcrichton, jfb, dschuff, sbc100, jgravelle-google, llvm-commits, aheejin

Differential Revision: https://reviews.llvm.org/D39866

llvm-svn: 317895

llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
llvm/test/CodeGen/WebAssembly/umulo-i64.ll

index 4a1e715..e22fe19 100644 (file)
@@ -8044,10 +8044,10 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
       uint64_t Offset = OldOffsets[i];
       MVT RegisterVT = getRegisterType(CLI.RetTy->getContext(), RetVT);
       unsigned NumRegs = getNumRegisters(CLI.RetTy->getContext(), RetVT);
-      unsigned RegisterVTSize = RegisterVT.getSizeInBits();
+      unsigned RegisterVTByteSZ = RegisterVT.getSizeInBits() / 8;
       RetTys.append(NumRegs, RegisterVT);
       for (unsigned j = 0; j != NumRegs; ++j)
-        Offsets.push_back(Offset + j * RegisterVTSize);
+        Offsets.push_back(Offset + j * RegisterVTByteSZ);
     }
   }
 
index e47c8aa..75c2d50 100644 (file)
@@ -1,7 +1,7 @@
 ; RUN: llc < %s -asm-verbose=false | FileCheck %s
 ; Test that UMULO works correctly on 64-bit operands.
 target datalayout = "e-m:e-p:32:32-i64:64-n32:64-S128"
-target triple = "wasm32-unknown-emscripten"
+target triple = "wasm32-unknown-unknown"
 
 ; CHECK-LABEL: _ZN4core3num21_$LT$impl$u20$u64$GT$15overflowing_mul17h07be88b4cbac028fE:
 ; CHECK:     __multi3
@@ -19,3 +19,14 @@ declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) #1
 
 attributes #0 = { inlinehint }
 attributes #1 = { nounwind readnone speculatable }
+
+; CHECK-LABEL: wut:
+; CHECK: call     __multi3@FUNCTION, $2, $0, $pop0, $1, $pop10
+; CHECK: i64.load $0=, 8($2)
+define i1 @wut(i64, i64) {
+start:
+  %2 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %0, i64 %1)
+  %3 = extractvalue { i64, i1 } %2, 1
+  ret i1 %3
+}
+