if (dev_priv->gart_info.bus_addr) {
/* Turn off PCI GART */
radeon_set_pcigart(dev_priv, 0);
- if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info))
- DRM_ERROR("failed to cleanup PCI GART!\n");
+ drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info);
}
if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB)
if (dev_priv->pcigart_offset_set == 1) {
drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev);
dev_priv->gart_info.addr = NULL;
+ dev_priv->pcigart_offset_set = 0;
}
}
}
radeon_mem_takedown(&(dev_priv->gart_heap));
radeon_mem_takedown(&(dev_priv->fb_heap));
-
- radeon_gem_mm_fini(dev);
+ if (dev_priv->user_mm_enable) {
+ radeon_gem_mm_fini(dev);
+ dev_priv->user_mm_enable = false;
+ }
/* deallocate kernel resources */
radeon_do_cleanup_cp(dev);
#define RADEON_SETPARAM_NEW_MEMMAP 4 /* Use new memory map */
#define RADEON_SETPARAM_PCIGART_TABLE_SIZE 5 /* PCI GART Table Size */
#define RADEON_SETPARAM_VBLANK_CRTC 6 /* VBLANK CRTC */
+#define RADEON_SETPARAM_MM_INIT 7 /* Initialise the mm */
/* 1.14: Clients can allocate/free a surface
*/
typedef struct drm_radeon_surface_alloc {
case RADEON_SETPARAM_VBLANK_CRTC:
return radeon_vblank_crtc_set(dev, sp->value);
break;
+ case RADEON_SETPARAM_MM_INIT:
+ dev_priv->user_mm_enable = true;
+ return radeon_gem_mm_init(dev);
default:
DRM_DEBUG("Invalid parameter %d\n", sp->param);
return -EINVAL;