+++ /dev/null
-Cadence SPI controller Device Tree Bindings
--------------------------------------------
-
-Required properties:
-- compatible : Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6".
-- reg : Physical base address and size of SPI registers map.
-- interrupts : Property with a value describing the interrupt
- number.
-- clock-names : List of input clock names - "ref_clk", "pclk"
- (See clock bindings for details).
-- clocks : Clock phandles (see clock bindings for details).
-
-Optional properties:
-- num-cs : Number of chip selects used.
- If a decoder is used, this will be the number of
- chip selects after the decoder.
-- is-decoded-cs : Flag to indicate whether decoder is used or not.
-
-Example:
-
- spi@e0007000 {
- compatible = "xlnx,zynq-spi-r1p6";
- clock-names = "ref_clk", "pclk";
- clocks = <&clkc 26>, <&clkc 35>;
- interrupt-parent = <&intc>;
- interrupts = <0 49 4>;
- num-cs = <4>;
- is-decoded-cs = <0>;
- reg = <0xe0007000 0x1000>;
- } ;
--- /dev/null
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/spi-cadence.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence SPI controller Device Tree Bindings
+
+maintainers:
+ - Michal Simek <michal.simek@xilinx.com>
+
+allOf:
+ - $ref: "spi-controller.yaml#"
+
+properties:
+ compatible:
+ enum:
+ - cdns,spi-r1p6
+ - xlnx,zynq-spi-r1p6
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: ref_clk
+ - const: pclk
+
+ clocks:
+ maxItems: 2
+
+ num-cs:
+ description: |
+ Number of chip selects used. If a decoder is used,
+ this will be the number of chip selects after the
+ decoder.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 4
+ default: 4
+
+ is-decoded-cs:
+ description: |
+ Flag to indicate whether decoder is used or not.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [ 0, 1 ]
+ default: 0
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ spi@e0007000 {
+ compatible = "xlnx,zynq-spi-r1p6";
+ clock-names = "ref_clk", "pclk";
+ clocks = <&clkc 26>, <&clkc 35>;
+ interrupt-parent = <&intc>;
+ interrupts = <0 49 4>;
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+ reg = <0xe0007000 0x1000>;
+ };
+...