arm64: dts: ti: k3-am64: MDIO pinmux should belong to the MDIO node
authorAndrew Davis <afd@ti.com>
Mon, 17 Oct 2022 19:25:29 +0000 (14:25 -0500)
committerNishanth Menon <nm@ti.com>
Fri, 28 Oct 2022 13:14:48 +0000 (08:14 -0500)
Although usually integrated as a child of an Ethernet controller, MDIO
IP has an independent pinout. This pinout should be controlled by
the MDIO node (so if it was to be disabled for instance, the pinmux
state would reflect that).

Move the MDIO pins pinmux to the MIDO nodes.

Signed-off-by: Andrew Davis <afd@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20221017192532.23825-8-afd@ti.com
arch/arm64/boot/dts/ti/k3-am642-evm.dts
arch/arm64/boot/dts/ti/k3-am642-sk.dts

index 2dec25d..2319ba4 100644 (file)
 
 &cpsw3g {
        pinctrl-names = "default";
-       pinctrl-0 = <&mdio1_pins_default
-                    &rgmii1_pins_default
+       pinctrl-0 = <&rgmii1_pins_default
                     &rgmii2_pins_default>;
 };
 
 };
 
 &cpsw3g_mdio {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mdio1_pins_default>;
+
        cpsw3g_phy0: ethernet-phy@0 {
                reg = <0>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
index 58c7160..c1d6346 100644 (file)
 
 &cpsw3g {
        pinctrl-names = "default";
-       pinctrl-0 = <&mdio1_pins_default
-                    &rgmii1_pins_default
+       pinctrl-0 = <&rgmii1_pins_default
                     &rgmii2_pins_default>;
 };
 
 };
 
 &cpsw3g_mdio {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mdio1_pins_default>;
+
        cpsw3g_phy0: ethernet-phy@0 {
                reg = <0>;
                ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;