powerpc: Remove CONFIG_PPC_BOOK3E_MMU
authorChristophe Leroy <christophe.leroy@csgroup.eu>
Mon, 19 Sep 2022 17:01:39 +0000 (19:01 +0200)
committerMichael Ellerman <mpe@ellerman.id.au>
Mon, 26 Sep 2022 13:00:14 +0000 (23:00 +1000)
CONFIG_PPC_BOOK3E_MMU is redundant with CONFIG_PPC_E500.

Remove it.

Also rename mmu-book3e.h to mmu-e500.h

Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/c5549cd59a131204ff94ab909cad2e2dad4ddf2f.1663606876.git.christophe.leroy@csgroup.eu
arch/powerpc/include/asm/nohash/mmu-e500.h [moved from arch/powerpc/include/asm/nohash/mmu-book3e.h with 100% similarity]
arch/powerpc/include/asm/nohash/mmu.h
arch/powerpc/kernel/cpu_setup_e500.S
arch/powerpc/kernel/entry_32.S
arch/powerpc/kernel/head_booke.h
arch/powerpc/kernel/kvm.c
arch/powerpc/kvm/e500.h
arch/powerpc/mm/nohash/tlb.c
arch/powerpc/mm/ptdump/Makefile
arch/powerpc/platforms/Kconfig.cputype

index edc793e..e264be2 100644 (file)
@@ -8,9 +8,9 @@
 #elif defined(CONFIG_44x)
 /* 44x-style software loaded TLB */
 #include <asm/nohash/32/mmu-44x.h>
-#elif defined(CONFIG_PPC_BOOK3E_MMU)
+#elif defined(CONFIG_PPC_E500)
 /* Freescale Book-E software loaded TLB or Book-3e (ISA 2.06+) MMU */
-#include <asm/nohash/mmu-book3e.h>
+#include <asm/nohash/mmu-e500.h>
 #elif defined (CONFIG_PPC_8xx)
 /* Motorola/Freescale 8xx software loaded TLB */
 #include <asm/nohash/32/mmu-8xx.h>
index 0583360..2ab2516 100644 (file)
@@ -12,7 +12,7 @@
 #include <asm/processor.h>
 #include <asm/cputable.h>
 #include <asm/ppc_asm.h>
-#include <asm/nohash/mmu-book3e.h>
+#include <asm/nohash/mmu-e500.h>
 #include <asm/asm-offsets.h>
 #include <asm/mpc85xx.h>
 
index e6d5fe3..2b5b067 100644 (file)
@@ -488,7 +488,7 @@ _ASM_NOKPROBE_SYMBOL(interrupt_return)
        mtspr   SPRN_##exc_lvl_srr0,r9;                                 \
        mtspr   SPRN_##exc_lvl_srr1,r10;
 
-#if defined(CONFIG_PPC_BOOK3E_MMU)
+#if defined(CONFIG_PPC_E500)
 #ifdef CONFIG_PHYS_64BIT
 #define        RESTORE_MAS7                                                    \
        lwz     r11,MAS7(r1);                                           \
index 1047dc0..1cb9d0f 100644 (file)
@@ -242,7 +242,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
 
 
 .macro SAVE_MMU_REGS
-#ifdef CONFIG_PPC_BOOK3E_MMU
+#ifdef CONFIG_PPC_E500
        mfspr   r0,SPRN_MAS0
        stw     r0,MAS0(r1)
        mfspr   r0,SPRN_MAS1
@@ -257,7 +257,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
        mfspr   r0,SPRN_MAS7
        stw     r0,MAS7(r1)
 #endif /* CONFIG_PHYS_64BIT */
-#endif /* CONFIG_PPC_BOOK3E_MMU */
+#endif /* CONFIG_PPC_E500 */
 #ifdef CONFIG_44x
        mfspr   r0,SPRN_MMUCR
        stw     r0,MMUCR(r1)
index 6568823..5b3c093 100644 (file)
@@ -455,7 +455,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features)
                kvm_patch_ins_lwz(inst, magic_var(dsisr), inst_rt);
                break;
 
-#ifdef CONFIG_PPC_BOOK3E_MMU
+#ifdef CONFIG_PPC_E500
        case KVM_INST_MFSPR(SPRN_MAS0):
                if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
                        kvm_patch_ins_lwz(inst, magic_var(mas0), inst_rt);
@@ -484,7 +484,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features)
                if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
                        kvm_patch_ins_lwz(inst, magic_var(mas7_3), inst_rt);
                break;
-#endif /* CONFIG_PPC_BOOK3E_MMU */
+#endif /* CONFIG_PPC_E500 */
 
        case KVM_INST_MFSPR(SPRN_SPRG4):
 #ifdef CONFIG_BOOKE
@@ -557,7 +557,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features)
        case KVM_INST_MTSPR(SPRN_DSISR):
                kvm_patch_ins_stw(inst, magic_var(dsisr), inst_rt);
                break;
-#ifdef CONFIG_PPC_BOOK3E_MMU
+#ifdef CONFIG_PPC_E500
        case KVM_INST_MTSPR(SPRN_MAS0):
                if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
                        kvm_patch_ins_stw(inst, magic_var(mas0), inst_rt);
@@ -586,7 +586,7 @@ static void __init kvm_check_ins(u32 *inst, u32 features)
                if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
                        kvm_patch_ins_stw(inst, magic_var(mas7_3), inst_rt);
                break;
-#endif /* CONFIG_PPC_BOOK3E_MMU */
+#endif /* CONFIG_PPC_E500 */
 
        case KVM_INST_MTSPR(SPRN_SPRG4):
                if (features & KVM_MAGIC_FEAT_MAS0_TO_SPRG7)
index c3ef751..6d0d329 100644 (file)
@@ -17,7 +17,7 @@
 #define KVM_E500_H
 
 #include <linux/kvm_host.h>
-#include <asm/nohash/mmu-book3e.h>
+#include <asm/nohash/mmu-e500.h>
 #include <asm/tlb.h>
 #include <asm/cputhreads.h>
 
index fcb1e5a..fac59fb 100644 (file)
@@ -49,7 +49,7 @@
  * other sizes not listed here.   The .ind field is only used on MMUs that have
  * indirect page table entries.
  */
-#if defined(CONFIG_PPC_BOOK3E_MMU) || defined(CONFIG_PPC_8xx)
+#if defined(CONFIG_PPC_E500) || defined(CONFIG_PPC_8xx)
 #ifdef CONFIG_PPC_E500
 struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT] = {
        [MMU_PAGE_4K] = {
@@ -142,7 +142,7 @@ static inline int mmu_get_tsize(int psize)
        /* This isn't used on !Book3E for now */
        return 0;
 }
-#endif /* CONFIG_PPC_BOOK3E_MMU */
+#endif /* CONFIG_PPC_E500 */
 
 /* The variables below are currently only used on 64-bit Book3E
  * though this will probably be made common with other nohash
index b533caa..dc896d2 100644 (file)
@@ -4,7 +4,7 @@ obj-y   += ptdump.o
 
 obj-$(CONFIG_4xx)              += shared.o
 obj-$(CONFIG_PPC_8xx)          += 8xx.o
-obj-$(CONFIG_PPC_BOOK3E_MMU)   += shared.o
+obj-$(CONFIG_PPC_E500)         += shared.o
 obj-$(CONFIG_PPC_BOOK3S_32)    += shared.o
 obj-$(CONFIG_PPC_BOOK3S_64)    += book3s64.o
 
index 32c60ad..1746d19 100644 (file)
@@ -466,10 +466,6 @@ config PPC_MMU_NOHASH
        def_bool y
        depends on !PPC_BOOK3S
 
-config PPC_BOOK3E_MMU
-       def_bool y
-       depends on PPC_85xx || PPC_BOOK3E_64
-
 config PPC_HAVE_PMU_SUPPORT
        bool