armv8: ls2040a: Add support of LS2040A SoC

Freescale's LS2040A is a another personality of LS2080A SoC
without AIOP support consisting of 4 armv8 cores.

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Acked-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
index e030430..b10ee43 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/cpu.h
@@ -12,6 +12,7 @@ static struct cpu_type cpu_type_list[] = {
        CPU_TYPE_ENTRY(LS2085, LS2085, 8),
        CPU_TYPE_ENTRY(LS2045, LS2045, 4),
        CPU_TYPE_ENTRY(LS1043, LS1043, 4),
+       CPU_TYPE_ENTRY(LS2040, LS2040, 4),
 };
 
 #ifndef CONFIG_SYS_DCACHE_OFF

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 1565592..ea78e15 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -45,6 +45,7 @@ struct cpu_type {
 #define SVR_LS2045             0x870120
 #define SVR_LS2080             0x870110
 #define SVR_LS2085             0x870100
+#define SVR_LS2040             0x870130
 
 #define SVR_MAJ(svr)           (((svr) >> 4) & 0xf)
 #define SVR_MIN(svr)           (((svr) >> 0) & 0xf)