[AArch64] Fix code formatting in the cpu-table

2015-02-11  Matthew Wahab  <matthew.wahab@arm.com>

	* config/tc-aarch64.c (aarch64_cpus): Fix code formatting.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index b3dc4b3..8a01dae 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,9 @@
 2015-02-11  Matthew Wahab  <matthew.wahab@arm.com>
 
+       * config/tc-aarch64.c (aarch64_cpus): Fix code formatting.
+
+2015-02-11  Matthew Wahab  <matthew.wahab@arm.com>
+
        * config/tc-arm.c: Add support for Cortex-A72.
 
 2015-02-09  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index 25ae8c3..af491f2 100644 (file)
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -7227,10 +7227,10 @@ struct aarch64_cpu_option_table
    recognized by GCC.  */
 static const struct aarch64_cpu_option_table aarch64_cpus[] = {
   {"all", AARCH64_ANY, NULL},
-  {"cortex-a53", AARCH64_FEATURE(AARCH64_ARCH_V8,
-                                AARCH64_FEATURE_CRC), "Cortex-A53"},
-  {"cortex-a57", AARCH64_FEATURE(AARCH64_ARCH_V8,
-                                AARCH64_FEATURE_CRC), "Cortex-A57"},
+  {"cortex-a53", AARCH64_FEATURE (AARCH64_ARCH_V8,
+                                 AARCH64_FEATURE_CRC), "Cortex-A53"},
+  {"cortex-a57", AARCH64_FEATURE (AARCH64_ARCH_V8,
+                                 AARCH64_FEATURE_CRC), "Cortex-A57"},
   {"cortex-a72", AARCH64_FEATURE (AARCH64_ARCH_V8,
                                  AARCH64_FEATURE_CRC), "Cortex-A72"},
   {"thunderx", AARCH64_ARCH_V8, "Cavium ThunderX"},
@@ -7239,8 +7239,8 @@ static const struct aarch64_cpu_option_table aarch64_cpus[] = {
      tools.  */
   {"xgene-1", AARCH64_ARCH_V8, "APM X-Gene 1"},
   {"xgene1", AARCH64_ARCH_V8, "APM X-Gene 1"},
-  {"xgene2", AARCH64_FEATURE(AARCH64_ARCH_V8,
-                            AARCH64_FEATURE_CRC), "APM X-Gene 2"},
+  {"xgene2", AARCH64_FEATURE (AARCH64_ARCH_V8,
+                             AARCH64_FEATURE_CRC), "APM X-Gene 2"},
   {"generic", AARCH64_ARCH_V8, NULL},
 
   {NULL, AARCH64_ARCH_NONE, NULL}