new_tex->texture_index = tex->texture_index;
new_tex->sampler_index = tex->sampler_index;
new_tex->dest_type = nir_type_int32;
- nir_src_copy(&new_tex->src[0].src, &tex->src[i].src);
+ nir_src_copy(&new_tex->src[0].src, &tex->src[i].src, &new_tex->instr);
new_tex->src[0].src_type = tex->src[i].src_type;
nir_ssa_dest_init(&new_tex->instr, &new_tex->dest,
nir_tex_instr_dest_size(new_tex), 32, NULL);
}
FALLTHROUGH;
default:
- nir_src_copy(&tex->src[i].src, &old_tex->src[i].src);
+ nir_src_copy(&tex->src[i].src, &old_tex->src[i].src, tex);
break;
}
}
nir_ssa_def *val = evaluate_rvalue(param_rvalue);
nir_src src = nir_src_for_ssa(val);
- nir_src_copy(&call->params[i], &src);
+ nir_src_copy(&call->params[i], &src, call);
} else if (sig_param->data.mode == ir_var_function_inout) {
unreachable("unimplemented: inout parameters");
}
/* NOTE: if the instruction you are copying a src to is already added
* to the IR, use nir_instr_rewrite_src() instead.
*/
-void nir_src_copy(nir_src *dest, const nir_src *src)
+void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
{
src_free_indirects(dest);
dest->reg.reg = src->reg.reg;
if (src->reg.indirect) {
dest->reg.indirect = calloc(1, sizeof(nir_src));
- nir_src_copy(dest->reg.indirect, src->reg.indirect);
+ nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
} else {
dest->reg.indirect = NULL;
}
}
}
-void nir_dest_copy(nir_dest *dest, const nir_dest *src)
+void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
{
/* Copying an SSA definition makes no sense whatsoever. */
assert(!src->is_ssa);
dest->reg.reg = src->reg.reg;
if (src->reg.indirect) {
dest->reg.indirect = calloc(1, sizeof(nir_src));
- nir_src_copy(dest->reg.indirect, src->reg.indirect);
+ nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
} else {
dest->reg.indirect = NULL;
}
}
void
-nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src)
+nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
+ nir_alu_instr *instr)
{
- nir_src_copy(&dest->src, &src->src);
+ nir_src_copy(&dest->src, &src->src, &instr->instr);
dest->abs = src->abs;
dest->negate = src->negate;
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
}
void
-nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src)
+nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
+ nir_alu_instr *instr)
{
- nir_dest_copy(&dest->dest, &src->dest);
+ nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
dest->write_mask = src->write_mask;
dest->saturate = src->saturate;
}
assert(!src_is_valid(src) || src->parent_instr == instr);
src_remove_all_uses(src);
- nir_src_copy(src, &new_src);
+ nir_src_copy(src, &new_src, instr);
src_add_all_uses(src, instr, NULL);
}
assert(!src_is_valid(src) || src->parent_if == if_stmt);
src_remove_all_uses(src);
- nir_src_copy(src, &new_src);
+ nir_src_copy(src, &new_src, if_stmt);
src_add_all_uses(src, NULL, if_stmt);
}
/* We can't re-write with an SSA def */
assert(!new_dest.is_ssa);
- nir_dest_copy(dest, &new_dest);
+ nir_dest_copy(dest, &new_dest, instr);
dest->reg.parent_instr = instr;
list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
return true;
}
-void nir_src_copy(nir_src *dest, const nir_src *src);
-void nir_dest_copy(nir_dest *dest, const nir_dest *src);
+void nir_src_copy(nir_src *dest, const nir_src *src, void *instr_or_if);
+void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr);
typedef struct {
/** Base source */
nir_alu_src src[];
} nir_alu_instr;
-void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src);
-void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src);
+void nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
+ nir_alu_instr *instr);
+void nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
+ nir_alu_instr *instr);
bool nir_alu_instr_is_copy(nir_alu_instr *instr);
tex->src[i].src_type == nir_tex_src_sampler_offset ||
tex->src[i].src_type == nir_tex_src_texture_handle ||
tex->src[i].src_type == nir_tex_src_sampler_handle) {
- nir_src_copy(&txs->src[idx].src, &tex->src[i].src);
+ nir_src_copy(&txs->src[idx].src, &tex->src[i].src, txs);
txs->src[idx].src_type = tex->src[i].src_type;
idx++;
}
tex->src[i].src_type == nir_tex_src_sampler_offset ||
tex->src[i].src_type == nir_tex_src_texture_handle ||
tex->src[i].src_type == nir_tex_src_sampler_handle) {
- nir_src_copy(&tql->src[idx].src, &tex->src[i].src);
+ nir_src_copy(&tql->src[idx].src, &tex->src[i].src, tql);
tql->src[idx].src_type = tex->src[i].src_type;
idx++;
}
parent = rematerialize_deref_in_block(parent, state);
new_deref->parent = nir_src_for_ssa(&parent->dest.ssa);
} else {
- nir_src_copy(&new_deref->parent, &deref->parent);
+ nir_src_copy(&new_deref->parent, &deref->parent, new_deref);
}
}
case nir_deref_type_array:
case nir_deref_type_ptr_as_array:
assert(!nir_src_as_deref(deref->arr.index));
- nir_src_copy(&new_deref->arr.index, &deref->arr.index);
+ nir_src_copy(&new_deref->arr.index, &deref->arr.index, new_deref);
break;
case nir_deref_type_struct:
assert(src.reg.reg->num_components >= dest_src.reg.reg->num_components);
nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_mov);
- nir_src_copy(&mov->src[0].src, &src);
+ nir_src_copy(&mov->src[0].src, &src, mov);
mov->dest.dest = nir_dest_for_reg(dest_src.reg.reg);
mov->dest.write_mask = (1 << dest_src.reg.reg->num_components) - 1;
for (int i = num_components - 1; i >= 0; i--) {
nir_alu_instr *chan = nir_alu_instr_create(builder->shader, chan_op);
nir_alu_ssa_dest_init(chan, 1, alu->dest.dest.ssa.bit_size);
- nir_alu_src_copy(&chan->src[0], &alu->src[0]);
+ nir_alu_src_copy(&chan->src[0], &alu->src[0], chan);
chan->src[0].swizzle[0] = chan->src[0].swizzle[i];
if (nir_op_infos[chan_op].num_inputs > 1) {
assert(nir_op_infos[chan_op].num_inputs == 2);
- nir_alu_src_copy(&chan->src[1], &alu->src[1]);
+ nir_alu_src_copy(&chan->src[1], &alu->src[1], chan);
chan->src[1].swizzle[0] = chan->src[1].swizzle[i];
}
chan->exact = alu->exact;
builder->shader, prev ? nir_op_ffma : nir_op_fmul);
nir_alu_ssa_dest_init(instr, 1, alu->dest.dest.ssa.bit_size);
for (unsigned j = 0; j < 2; j++) {
- nir_alu_src_copy(&instr->src[j], &alu->src[j]);
+ nir_alu_src_copy(&instr->src[j], &alu->src[j], instr);
instr->src[j].swizzle[0] = alu->src[j].swizzle[i];
}
if (i != num_components - 1)
nir_alu_instr *lower = nir_alu_instr_create(b->shader, alu->op);
for (i = 0; i < num_src; i++) {
- nir_alu_src_copy(&lower->src[i], &alu->src[i]);
+ nir_alu_src_copy(&lower->src[i], &alu->src[i], lower);
/* We only handle same-size-as-dest (input_sizes[] == 0) or scalar
* args (input_sizes[] == 1).
/* remapped to ssbo_atomic_add: { buffer_idx, offset, +1 } */
temp = nir_imm_int(b, +1);
new_instr->src[0] = nir_src_for_ssa(buffer);
- nir_src_copy(&new_instr->src[1], &instr->src[0]);
+ nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr);
new_instr->src[2] = nir_src_for_ssa(temp);
break;
case nir_intrinsic_atomic_counter_pre_dec:
/* NOTE semantic difference so we adjust the return value below */
temp = nir_imm_int(b, -1);
new_instr->src[0] = nir_src_for_ssa(buffer);
- nir_src_copy(&new_instr->src[1], &instr->src[0]);
+ nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr);
new_instr->src[2] = nir_src_for_ssa(temp);
break;
case nir_intrinsic_atomic_counter_read:
/* remapped to load_ssbo: { buffer_idx, offset } */
new_instr->src[0] = nir_src_for_ssa(buffer);
- nir_src_copy(&new_instr->src[1], &instr->src[0]);
+ nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr);
break;
default:
/* remapped to ssbo_atomic_x: { buffer_idx, offset, data, (compare)? } */
new_instr->src[0] = nir_src_for_ssa(buffer);
- nir_src_copy(&new_instr->src[1], &instr->src[0]);
- nir_src_copy(&new_instr->src[2], &instr->src[1]);
+ nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr);
+ nir_src_copy(&new_instr->src[2], &instr->src[1], new_instr);
if (op == nir_intrinsic_ssbo_atomic_comp_swap ||
op == nir_intrinsic_ssbo_atomic_fcomp_swap)
- nir_src_copy(&new_instr->src[3], &instr->src[2]);
+ nir_src_copy(&new_instr->src[3], &instr->src[2], new_instr);
break;
}
if ((type & (nir_type_uint | nir_type_int)) && bit_size == 32 &&
alu && (alu->op == nir_op_b2i8 || alu->op == nir_op_b2i16)) {
nir_alu_instr *instr = nir_alu_instr_create(bld->shader, nir_op_b2i32);
- nir_alu_src_copy(&instr->src[0], &alu->src[0]);
+ nir_alu_src_copy(&instr->src[0], &alu->src[0], instr);
return nir_builder_alu_instr_finish_and_insert(bld, instr);
}
/* Copy over any other sources. This is needed for interp_deref_at */
for (unsigned i = 1;
i < nir_intrinsic_infos[orig_instr->intrinsic].num_srcs; i++)
- nir_src_copy(&load->src[i], &orig_instr->src[i]);
+ nir_src_copy(&load->src[i], &orig_instr->src[i], load);
nir_ssa_dest_init(&load->instr, &load->dest,
orig_instr->dest.ssa.num_components,
if (intrin->intrinsic == nir_intrinsic_interp_deref_at_sample ||
intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
intrin->intrinsic == nir_intrinsic_interp_deref_at_vertex)
- nir_src_copy(&bary_setup->src[0], &intrin->src[1]);
+ nir_src_copy(&bary_setup->src[0], &intrin->src[1], bary_setup);
nir_builder_instr_insert(b, &bary_setup->instr);
if (intr->intrinsic == nir_intrinsic_interp_deref_at_offset ||
intr->intrinsic == nir_intrinsic_interp_deref_at_sample ||
intr->intrinsic == nir_intrinsic_interp_deref_at_vertex) {
- nir_src_copy(&element_intr->src[1], &intr->src[1]);
+ nir_src_copy(&element_intr->src[1], &intr->src[1],
+ &element_intr->instr);
}
nir_ssa_def_rewrite_uses(&intr->dest.ssa,
} else {
nir_intrinsic_set_write_mask(element_intr,
nir_intrinsic_write_mask(intr));
- nir_src_copy(&element_intr->src[1], &intr->src[1]);
+ nir_src_copy(&element_intr->src[1], &intr->src[1],
+ &element_intr->instr);
}
nir_builder_instr_insert(b, &element_intr->instr);
set_io_semantics(chan_intr, intr, i);
/* offset and vertex (if needed) */
for (unsigned j = 0; j < nir_intrinsic_infos[intr->intrinsic].num_srcs; ++j)
- nir_src_copy(&chan_intr->src[j], &intr->src[j]);
+ nir_src_copy(&chan_intr->src[j], &intr->src[j], &chan_intr->instr);
nir_builder_instr_insert(b, &chan_intr->instr);
if (nir_intrinsic_has_base(intr))
nir_intrinsic_set_base(chan_intr, nir_intrinsic_base(intr));
for (unsigned j = 0; j < nir_intrinsic_infos[intr->intrinsic].num_srcs - 1; j++)
- nir_src_copy(&chan_intr->src[j], &intr->src[j]);
+ nir_src_copy(&chan_intr->src[j], &intr->src[j], &chan_intr->instr);
/* increment offset per component */
nir_ssa_def *offset = nir_iadd_imm(b, base_offset, i * (intr->dest.ssa.bit_size / 8));
chan_intr->src[0] = nir_src_for_ssa(nir_channel(b, value, i));
/* offset and vertex (if needed) */
for (unsigned j = 1; j < nir_intrinsic_infos[intr->intrinsic].num_srcs; ++j)
- nir_src_copy(&chan_intr->src[j], &intr->src[j]);
+ nir_src_copy(&chan_intr->src[j], &intr->src[j], &chan_intr->instr);
nir_builder_instr_insert(b, &chan_intr->instr);
}
/* value */
chan_intr->src[0] = nir_src_for_ssa(nir_channel(b, value, i));
for (unsigned j = 1; j < nir_intrinsic_infos[intr->intrinsic].num_srcs - 1; j++)
- nir_src_copy(&chan_intr->src[j], &intr->src[j]);
+ nir_src_copy(&chan_intr->src[j], &intr->src[j], &chan_intr->instr);
/* increment offset per component */
nir_ssa_def *offset = nir_iadd_imm(b, base_offset, i * (value->bit_size / 8));
if (intr->intrinsic == nir_intrinsic_interp_deref_at_offset ||
intr->intrinsic == nir_intrinsic_interp_deref_at_sample ||
intr->intrinsic == nir_intrinsic_interp_deref_at_vertex)
- nir_src_copy(&chan_intr->src[1], &intr->src[1]);
+ nir_src_copy(&chan_intr->src[1], &intr->src[1], &chan_intr->instr);
nir_builder_instr_insert(b, &chan_intr->instr);
nir_ssa_def_rewrite_uses(&intrin->dest.ssa,
&mov->dest.dest.ssa);
} else {
- nir_dest_copy(&mov->dest.dest, &intrin->dest);
+ nir_dest_copy(&mov->dest.dest, &intrin->dest, &mov->instr);
}
nir_builder_instr_insert(b, &mov->instr);
nir_alu_instr *mov = nir_alu_instr_create(b->shader, nir_op_mov);
- nir_src_copy(&mov->src[0].src, &intrin->src[1]);
+ nir_src_copy(&mov->src[0].src, &intrin->src[1], mov);
/* The normal NIR SSA copy propagate pass can't happen after this pass,
* so do an ad-hoc copy propagate since this ALU op can do swizzles
nir_op_mov);
nir_ssa_dest_init(&mov->instr, &mov->dest.dest, 1, bit_size, NULL);
mov->dest.write_mask = 1;
- nir_src_copy(&mov->src[0].src, &src->src);
+ nir_src_copy(&mov->src[0].src, &src->src, &mov->instr);
mov->src[0].swizzle[0] = i;
/* Insert at the end of the predecessor but before the jump */
{
nir_intrinsic_instr *load = nir_intrinsic_instr_create(b->shader, op);
load->num_components = 1;
- nir_src_copy(&load->src[0], idx);
+ nir_src_copy(&load->src[0], idx, load);
nir_ssa_dest_init(&load->instr, &load->dest, 1, bitsize, NULL);
nir_builder_instr_insert(b, &load->instr);
return &load->dest.ssa;
}
if (is_store) {
- nir_src_copy(&global->src[0], &intr->src[0]);
+ nir_src_copy(&global->src[0], &intr->src[0], global);
nir_intrinsic_set_write_mask(global, nir_intrinsic_write_mask(intr));
} else {
nir_ssa_dest_init(&global->instr, &global->dest,
intr->dest.ssa.bit_size, NULL);
if (is_atomic) {
- nir_src_copy(&global->src[1], &intr->src[2]);
+ nir_src_copy(&global->src[1], &intr->src[2], global);
if (nir_intrinsic_infos[op].num_srcs > 2)
- nir_src_copy(&global->src[2], &intr->src[3]);
+ nir_src_copy(&global->src[2], &intr->src[3], global);
}
}
intr->const_index[1] = intrin->const_index[1];
intr->src[0] = nir_src_for_ssa(comp);
if (nir_intrinsic_infos[intrin->intrinsic].num_srcs == 2)
- nir_src_copy(&intr->src[1], &intrin->src[1]);
+ nir_src_copy(&intr->src[1], &intrin->src[1], intr);
intr->num_components = 1;
nir_builder_instr_insert(b, &intr->instr);
/* invocation */
if (nir_intrinsic_infos[intrin->intrinsic].num_srcs > 1) {
assert(nir_intrinsic_infos[intrin->intrinsic].num_srcs == 2);
- nir_src_copy(&chan_intrin->src[1], &intrin->src[1]);
+ nir_src_copy(&chan_intrin->src[1], &intrin->src[1], chan_intrin);
}
chan_intrin->const_index[0] = intrin->const_index[0];
nir_intrinsic_instr *swizzle = nir_intrinsic_instr_create(
b->shader, nir_intrinsic_masked_swizzle_amd);
swizzle->num_components = intrin->num_components;
- nir_src_copy(&swizzle->src[0], &intrin->src[0]);
+ nir_src_copy(&swizzle->src[0], &intrin->src[0], swizzle);
nir_intrinsic_set_swizzle_mask(swizzle, (mask << 10) | 0x1f);
nir_ssa_dest_init(&swizzle->instr, &swizzle->dest,
intrin->dest.ssa.num_components,
nir_intrinsic_instr *shuffle =
nir_intrinsic_instr_create(b->shader, nir_intrinsic_shuffle);
shuffle->num_components = intrin->num_components;
- nir_src_copy(&shuffle->src[0], &intrin->src[0]);
+ nir_src_copy(&shuffle->src[0], &intrin->src[0], shuffle);
shuffle->src[1] = nir_src_for_ssa(index);
nir_ssa_dest_init(&shuffle->instr, &shuffle->dest,
intrin->dest.ssa.num_components,
qbcst->num_components = intrin->num_components;
qbcst->src[1] = nir_src_for_ssa(nir_imm_int(b, i));
- nir_src_copy(&qbcst->src[0], &intrin->src[0]);
+ nir_src_copy(&qbcst->src[0], &intrin->src[0], qbcst);
nir_ssa_dest_init(&qbcst->instr, &qbcst->dest,
intrin->dest.ssa.num_components,
intrin->dest.ssa.bit_size, NULL);
nir_tex_instr *plane_tex =
nir_tex_instr_create(b->shader, tex->num_srcs + 1);
for (unsigned i = 0; i < tex->num_srcs; i++) {
- nir_src_copy(&plane_tex->src[i].src, &tex->src[i].src);
+ nir_src_copy(&plane_tex->src[i].src, &tex->src[i].src, plane_tex);
plane_tex->src[i].src_type = tex->src[i].src_type;
}
plane_tex->src[tex->num_srcs].src = nir_src_for_ssa(nir_imm_int(b, plane));
/* reuse existing srcs */
for (unsigned i = 0; i < tex->num_srcs; i++) {
- nir_src_copy(&txd->src[i].src, &tex->src[i].src);
+ nir_src_copy(&txd->src[i].src, &tex->src[i].src, txd);
txd->src[i].src_type = tex->src[i].src_type;
}
int coord = nir_tex_instr_src_index(tex, nir_tex_src_coord);
/* reuse all but bias src */
for (int i = 0; i < 2; i++) {
if (tex->src[i].src_type != nir_tex_src_bias) {
- nir_src_copy(&txl->src[i].src, &tex->src[i].src);
+ nir_src_copy(&txl->src[i].src, &tex->src[i].src, txl);
txl->src[i].src_type = tex->src[i].src_type;
}
}
tex_copy->dest_type = tex->dest_type;
for (unsigned j = 0; j < tex->num_srcs; ++j) {
- nir_src_copy(&tex_copy->src[j].src, &tex->src[j].src);
+ nir_src_copy(&tex_copy->src[j].src, &tex->src[j].src, tex_copy);
tex_copy->src[j].src_type = tex->src[j].src_type;
}
return 1 << start_idx;
nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_mov);
- nir_alu_src_copy(&mov->src[0], &vec->src[start_idx]);
- nir_alu_dest_copy(&mov->dest, &vec->dest);
+ nir_alu_src_copy(&mov->src[0], &vec->src[start_idx], mov);
+ nir_alu_dest_copy(&mov->dest, &vec->dest, mov);
mov->dest.write_mask = (1u << start_idx);
mov->src[0].swizzle[start_idx] = vec->src[start_idx].swizzle[0];
nir_phi_instr *phi = nir_instr_as_phi(instr);
nir_alu_instr *sel = nir_alu_instr_create(shader, nir_op_bcsel);
- nir_src_copy(&sel->src[0].src, &if_stmt->condition);
+ nir_src_copy(&sel->src[0].src, &if_stmt->condition, sel);
/* Splat the condition to all channels */
memset(sel->src[0].swizzle, 0, sizeof sel->src[0].swizzle);
assert(src->src.is_ssa);
unsigned idx = src->pred == then_block ? 1 : 2;
- nir_src_copy(&sel->src[idx].src, &src->src);
+ nir_src_copy(&sel->src[idx].src, &src->src, sel);
}
nir_ssa_dest_init(&sel->instr, &sel->dest.dest,
*/
nir_instr_rewrite_src(&instr->instr, &instr->src[0].src,
instr->src[i == 1 ? 2 : 1].src);
- nir_alu_src_copy(&instr->src[0], &instr->src[i == 1 ? 2 : 1]);
+ nir_alu_src_copy(&instr->src[0], &instr->src[i == 1 ? 2 : 1],
+ instr);
nir_src empty_src;
memset(&empty_src, 0, sizeof(empty_src));
assert(state->variables_seen & (1 << var->variable));
nir_alu_src val = { NIR_SRC_INIT };
- nir_alu_src_copy(&val, &state->variables[var->variable]);
+ nir_alu_src_copy(&val, &state->variables[var->variable],
+ (void *)build->shader);
assert(!var->is_constant);
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
unsigned write_mask = (1u << start_idx);
nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_mov);
- nir_alu_src_copy(&mov->src[0], &vec->src[start_idx]);
+ nir_alu_src_copy(&mov->src[0], &vec->src[start_idx], mov);
mov->src[0].swizzle[0] = vec->src[start_idx].swizzle[0];
mov->src[0].negate = vec->src[start_idx].negate;
nir_intrinsic_set_dest_type(new_intrin, nir_intrinsic_dest_type(intrin));
/* offset */
- nir_src_copy(&new_intrin->src[0], &intrin->src[0]);
+ nir_src_copy(&new_intrin->src[0], &intrin->src[0], new_intrin);
nir_builder_instr_insert(b, &new_intrin->instr);
nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa,
if (intr->intrinsic == nir_intrinsic_interp_deref_at_offset ||
intr->intrinsic == nir_intrinsic_interp_deref_at_sample)
- nir_src_copy(&new_intr->src[1], &intr->src[1]);
+ nir_src_copy(&new_intr->src[1], &intr->src[1], &new_intr->instr);
nir_builder_instr_insert(b, &new_intr->instr);
mov->dest.dest.reg.base_offset = 0;
mov->dest.dest.reg.indirect = (nir_src *)calloc(1, sizeof(nir_src));
nir_src addr = nir_src_for_ssa(c2);
- nir_src_copy(mov->dest.dest.reg.indirect, &addr);
+ nir_src_copy(mov->dest.dest.reg.indirect, &addr, mov);
nir_builder_instr_insert(&b, &mov->instr);
auto addr_reg = factory->src(addr, 0);
new_instr->src[0] = nir_src_for_ssa(&deref_arr->dest.ssa);
/* deref ops have no offset src, so copy the srcs after it */
for (unsigned i = 2; i < nir_intrinsic_infos[intr->intrinsic].num_srcs; i++)
- nir_src_copy(&new_instr->src[i - 1], &intr->src[i]);
+ nir_src_copy(&new_instr->src[i - 1], &intr->src[i], new_instr);
nir_builder_instr_insert(b, &new_instr->instr);
result[i] = &new_instr->dest.ssa;
nir_ssa_def *c = nir_channels(b, psrc->ssa, BITFIELD_MASK(nir_tex_instr_src_size(array_tex, s)));
array_tex->src[s].src = nir_src_for_ssa(c);
} else
- nir_src_copy(&array_tex->src[s].src, psrc);
+ nir_src_copy(&array_tex->src[s].src, psrc, array_tex);
s++;
}
for (int i = 0; i < tex->num_srcs; i++) {
if (i == bias_idx)
continue;
- nir_src_copy(&txl->src[s].src, &tex->src[i].src);
+ nir_src_copy(&txl->src[s].src, &tex->src[i].src, txl);
txl->src[s].src_type = tex->src[i].src_type;
s++;
}
nir_intrinsic_set_range(chan_intr, scaled_range);
/* Base (desc_set, binding). */
- nir_src_copy(&chan_intr->src[0], &intr->src[0]);
+ nir_src_copy(&chan_intr->src[0], &intr->src[0], &chan_intr->instr);
/* Offset (unused). */
chan_intr->src[1] = nir_src_for_ssa(nir_imm_int(b, 0));
for (unsigned j = 0; j < add->dest.dest.ssa.num_components; j++)
ffma->src[i].swizzle[j] = mul->src[i].swizzle[swizzle[j]];
}
- nir_alu_src_copy(&ffma->src[2], &add->src[1 - add_mul_src]);
+ nir_alu_src_copy(&ffma->src[2], &add->src[1 - add_mul_src], ffma);
assert(add->dest.dest.is_ssa);
}
FALLTHROUGH;
default:
- nir_src_copy(&tex->src[i].src, &old_tex->src[i].src);
+ nir_src_copy(&tex->src[i].src, &old_tex->src[i].src, tex);
break;
}
}
nir_src *psrc = (tex->src[i].src_type == nir_tex_src_coord) ?
&coord_src : &tex->src[i].src;
- nir_src_copy(&array_tex->src[i].src, psrc);
+ nir_src_copy(&array_tex->src[i].src, psrc, array_tex);
array_tex->src[i].src_type = tex->src[i].src_type;
}
nir_ssa_def *ssa_src = nir_channels(b, tex->src[coord_index].src.ssa,
(1 << coord_components) - 1);
nir_src src = nir_src_for_ssa(ssa_src);
- nir_src_copy(&tql->src[0].src, &src);
+ nir_src_copy(&tql->src[0].src, &src, tql);
tql->src[0].src_type = nir_tex_src_coord;
unsigned idx = 1;
tex->src[i].src_type == nir_tex_src_sampler_offset ||
tex->src[i].src_type == nir_tex_src_texture_handle ||
tex->src[i].src_type == nir_tex_src_sampler_handle) {
- nir_src_copy(&tql->src[idx].src, &tex->src[i].src);
+ nir_src_copy(&tql->src[idx].src, &tex->src[i].src, tql);
tql->src[idx].src_type = tex->src[i].src_type;
idx++;
}
if (tex->src[i].src_type == nir_tex_src_texture_deref ||
tex->src[i].src_type == nir_tex_src_texture_offset ||
tex->src[i].src_type == nir_tex_src_texture_handle) {
- nir_src_copy(&txf->src[idx].src, &tex->src[i].src);
+ nir_src_copy(&txf->src[idx].src, &tex->src[i].src, txf);
txf->src[idx].src_type = tex->src[i].src_type;
idx++;
}
/* TODO: Indirect samplers, separate sampler objects XXX */
nir_src idx = nir_src_for_ssa(nir_imm_int(b, tex->texture_index));
- nir_src_copy(&l->src[0], &idx);
+ nir_src_copy(&l->src[0], &idx, l);
nir_builder_instr_insert(b, &l->instr);
nir_ssa_def *params = &l->dest.ssa;