arm64: dts: qcom: sm8450: add interconnect nodes

And the various interconnect nodes found in SM8450 SoC and use it for
UFS controller.

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220203002936.3009402-1-vkoul@kernel.org

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index a2ed8ed..eccbfee 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -9,6 +9,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/mailbox/qcom-ipcc.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
+#include <dt-bindings/interconnect/qcom,sm8450.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
 
 / {
@@ -251,6 +252,18 @@
                };
        };
 
+       clk_virt: interconnect@0 {
+               compatible = "qcom,sm8450-clk-virt";
+               #interconnect-cells = <2>;
+               qcom,bcm-voters = <&apps_bcm_voter>;
+       };
+
+       mc_virt: interconnect@1 {
+               compatible = "qcom,sm8450-mc-virt";
+               #interconnect-cells = <2>;
+               qcom,bcm-voters = <&apps_bcm_voter>;
+       };
+
        memory@a0000000 {
                device_type = "memory";
                /* We expect the bootloader to fill in the size */
@@ -737,6 +750,54 @@
                        };
                };
 
+               config_noc: interconnect@1500000 {
+                       compatible = "qcom,sm8450-config-noc";
+                       reg = <0 0x01500000 0 0x1c000>;
+                       #interconnect-cells = <2>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               system_noc: interconnect@1680000 {
+                       compatible = "qcom,sm8450-system-noc";
+                       reg = <0 0x01680000 0 0x1e200>;
+                       #interconnect-cells = <2>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               pcie_noc: interconnect@16c0000 {
+                       compatible = "qcom,sm8450-pcie-anoc";
+                       reg = <0 0x016c0000 0 0xe280>;
+                       #interconnect-cells = <2>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               aggre1_noc: interconnect@16e0000 {
+                       compatible = "qcom,sm8450-aggre1-noc";
+                       reg = <0 0x016e0000 0 0x1c080>;
+                       #interconnect-cells = <2>;
+                       clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+                                <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               aggre2_noc: interconnect@1700000 {
+                       compatible = "qcom,sm8450-aggre2-noc";
+                       reg = <0 0x01700000 0 0x31080>;
+                       #interconnect-cells = <2>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+                       clocks = <&gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK>,
+                                <&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
+                                <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
+                                <&rpmhcc RPMH_IPA_CLK>;
+               };
+
+               mmss_noc: interconnect@1740000 {
+                       compatible = "qcom,sm8450-mmss-noc";
+                       reg = <0 0x01740000 0 0x1f080>;
+                       #interconnect-cells = <2>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
                tcsr_mutex: hwlock@1f40000 {
                        compatible = "qcom,tcsr-mutex";
                        reg = <0x0 0x01f40000 0x0 0x40000>;
@@ -1285,6 +1346,13 @@
                        #freq-domain-cells = <1>;
                };
 
+               gem_noc: interconnect@19100000 {
+                       compatible = "qcom,sm8450-gem-noc";
+                       reg = <0 0x19100000 0 0xbb800>;
+                       #interconnect-cells = <2>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
                ufs_mem_hc: ufshc@1d84000 {
                        compatible = "qcom,sm8450-ufshc", "qcom,ufshc",
                                     "jedec,ufs-2.0";
@@ -1301,6 +1369,9 @@
 
                        iommus = <&apps_smmu 0xe0 0x0>;
 
+                       interconnects = <&aggre1_noc MASTER_UFS_MEM &mc_virt SLAVE_EBI1>,
+                                       <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_UFS_MEM_CFG>;
+                       interconnect-names = "ufs-ddr", "cpu-ufs";
                        clock-names =
                                "core_clk",
                                "bus_aggr_clk",
@@ -1399,6 +1470,20 @@
                                phy-names = "usb2-phy", "usb3-phy";
                        };
                };
+
+               nsp_noc: interconnect@320c0000 {
+                       compatible = "qcom,sm8450-nsp-noc";
+                       reg = <0 0x320c0000 0 0x10000>;
+                       #interconnect-cells = <2>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
+
+               lpass_ag_noc: interconnect@3c40000 {
+                       compatible = "qcom,sm8450-lpass-ag-noc";
+                       reg = <0 0x3c40000 0 0x17200>;
+                       #interconnect-cells = <2>;
+                       qcom,bcm-voters = <&apps_bcm_voter>;
+               };
        };
 
        timer {