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[Tizen] Add coreclr crossgen2 skips for RPI4 for armhf
authorGleb Balykov <g.balykov@samsung.com>
Fri, 7 Oct 2022 10:15:26 +0000 (13:15 +0300)
committerAlexander Soldatov/Platform Lab /SRR/Staff Engineer/Samsung Electronics <soldatov.a@samsung.com>
Tue, 11 Oct 2022 08:31:31 +0000 (11:31 +0300)
These are mostly a subset of src/tests/issues.targets with some additional excludes:

- BasicTestWithMcj is skipped because it manually invokes crossgen2

unsupportedCrossgenLibs.arm.txt [new file with mode: 0644] patch | blob
unsupportedCrossgenTests.arm.txt [new file with mode: 0644] patch | blob

diff --git a/unsupportedCrossgenLibs.arm.txt b/unsupportedCrossgenLibs.arm.txt
new file mode 100644 (file)
index 0000000..e69de29
diff --git a/unsupportedCrossgenTests.arm.txt b/unsupportedCrossgenTests.arm.txt
new file mode 100644 (file)
index 0000000..bb6106c
--- /dev/null
+++ b/unsupportedCrossgenTests.arm.txt
@@ -0,0 +1,3 @@
+Interop/StructMarshalling/PInvoke/MarshalStructAsLayoutExp/MarshalStructAsLayoutExp.sh
+JIT/Directed/debugging/poison/poison.sh
+baseservices/TieredCompilation/BasicTestWithMcj/BasicTestWithMcj.sh
Domain: Dotnet / Core;