drm/i915: Handle set_cache_level errors in the pipe control scratch setup
authorDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 14 Feb 2014 13:01:13 +0000 (14:01 +0100)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 14 Feb 2014 13:17:35 +0000 (14:17 +0100)
Split out from Chris vma-bind rework.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ben Widawsky <benjamin.widawsky@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_ringbuffer.c

index f256d5f..0fd6ba0 100644 (file)
@@ -531,7 +531,9 @@ init_pipe_control(struct intel_ring_buffer *ring)
                goto err;
        }
 
-       i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC);
+       ret = i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC);
+       if (ret)
+               goto err_unref;
 
        ret = i915_gem_obj_ggtt_pin(ring->scratch.obj, 4096, 0);
        if (ret)