drivers/perf: hisi: Fix wrong value for all counters enable
authorShaokun Zhang <zhangshaokun@hisilicon.com>
Fri, 5 Jun 2020 09:43:41 +0000 (17:43 +0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 24 Jun 2020 15:50:41 +0000 (17:50 +0200)
[ Upstream commit 961abd78adcb4c72c343fcd9f9dc5e2ebbe9b448 ]

In L3C uncore PMU drivers, bit16 is used to control all counters enable &
disable. Wrong value is given in the driver and its default value is 1'b1,
it can work because each PMU counter has its own control bits too.
Let's fix the wrong value.

Fixes: 2940bc433370 ("perf: hisi: Add support for HiSilicon SoC L3C PMU driver")
Signed-off-by: Shaokun Zhang <zhangshaokun@hisilicon.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/1591350221-32275-1-git-send-email-zhangshaokun@hisilicon.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c

index 078b8dc..c5b0950 100644 (file)
@@ -35,7 +35,7 @@
 /* L3C has 8-counters */
 #define L3C_NR_COUNTERS                0x8
 
-#define L3C_PERF_CTRL_EN       0x20000
+#define L3C_PERF_CTRL_EN       0x10000
 #define L3C_EVTYPE_NONE                0xff
 
 /*