Delegate setup of TCG temporaries to targets
authorBlue Swirl <blauwirbel@gmail.com>
Sat, 14 May 2011 12:58:04 +0000 (12:58 +0000)
committerBlue Swirl <blauwirbel@gmail.com>
Sun, 26 Jun 2011 18:25:43 +0000 (18:25 +0000)
Delegate TCG temp_buf setup to targets, so that they can use a stack
frame later instead.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg/arm/tcg-target.c
tcg/hppa/tcg-target.c
tcg/i386/tcg-target.c
tcg/ia64/tcg-target.c
tcg/mips/tcg-target.c
tcg/ppc/tcg-target.c
tcg/ppc64/tcg-target.c
tcg/s390/tcg-target.c
tcg/sparc/tcg-target.c
translate-all.c

index 457ad7e..93eb0f1 100644 (file)
@@ -1804,6 +1804,8 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_PC);
 
     tcg_add_target_add_op_defs(arm_op_defs);
+    tcg_set_frame(s, TCG_AREG0, offsetof(CPUState, temp_buf),
+                  CPU_TEMP_BUF_NLONGS * sizeof(long));
 }
 
 static inline void tcg_out_ld(TCGContext *s, TCGType type, int arg,
index 7248520..79bca63 100644 (file)
@@ -1682,4 +1682,6 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R31); /* ble link reg */
 
     tcg_add_target_add_op_defs(hppa_op_defs);
+    tcg_set_frame(s, TCG_AREG0, offsetof(CPUState, temp_buf),
+                  CPU_TEMP_BUF_NLONGS * sizeof(long));
 }
index 72b3a48..3ff9105 100644 (file)
@@ -1981,4 +1981,6 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_ESP);
 
     tcg_add_target_add_op_defs(x86_op_defs);
+    tcg_set_frame(s, TCG_AREG0, offsetof(CPUState, temp_buf),
+                  CPU_TEMP_BUF_NLONGS * sizeof(long));
 }
index 246b2c0..6386a5b 100644 (file)
@@ -2388,4 +2388,6 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_R6);
 
     tcg_add_target_add_op_defs(ia64_op_defs);
+    tcg_set_frame(s, TCG_AREG0, offsetof(CPUState, temp_buf),
+                  CPU_TEMP_BUF_NLONGS * sizeof(long));
 }
index cb2ab8b..12ff9d5 100644 (file)
@@ -1528,4 +1528,6 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_SP);   /* stack pointer */
 
     tcg_add_target_add_op_defs(mips_op_defs);
+    tcg_set_frame(s, TCG_AREG0, offsetof(CPUState, temp_buf),
+                  CPU_TEMP_BUF_NLONGS * sizeof(long));
 }
index 266e699..dde4e18 100644 (file)
@@ -1919,4 +1919,6 @@ static void tcg_target_init(TCGContext *s)
 #endif
 
     tcg_add_target_add_op_defs(ppc_op_defs);
+    tcg_set_frame(s, TCG_AREG0, offsetof(CPUState, temp_buf),
+                  CPU_TEMP_BUF_NLONGS * sizeof(long));
 }
index 2e3cd2b..3218438 100644 (file)
@@ -1696,4 +1696,6 @@ static void tcg_target_init (TCGContext *s)
     tcg_regset_set_reg (s->reserved_regs, TCG_REG_R13);
 
     tcg_add_target_add_op_defs (ppc_op_defs);
+    tcg_set_frame(s, TCG_AREG0, offsetof(CPUState, temp_buf),
+                  CPU_TEMP_BUF_NLONGS * sizeof(long));
 }
index 8d8498c..2fc5646 100644 (file)
@@ -2291,6 +2291,8 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
 
     tcg_add_target_add_op_defs(s390_op_defs);
+    tcg_set_frame(s, TCG_AREG0, offsetof(CPUState, temp_buf),
+                  CPU_TEMP_BUF_NLONGS * sizeof(long));
 }
 
 static void tcg_target_qemu_prologue(TCGContext *s)
index ecf7ace..86f8c1e 100644 (file)
@@ -1566,4 +1566,6 @@ static void tcg_target_init(TCGContext *s)
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_O6);
     tcg_regset_set_reg(s->reserved_regs, TCG_REG_O7);
     tcg_add_target_add_op_defs(sparc_op_defs);
+    tcg_set_frame(s, TCG_AREG0, offsetof(CPUState, temp_buf),
+                  CPU_TEMP_BUF_NLONGS * sizeof(long));
 }
index 24878aa..041c108 100644 (file)
@@ -43,8 +43,6 @@ uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
 void cpu_gen_init(void)
 {
     tcg_context_init(&tcg_ctx); 
-    tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf),
-                  CPU_TEMP_BUF_NLONGS * sizeof(long));
 }
 
 /* return non zero if the very first instruction is invalid so that