ath9k: split set11nRateFlags and set11nChainSel
authorWenli Looi <wlooi@ucalgary.ca>
Sun, 20 Mar 2022 23:30:06 +0000 (17:30 -0600)
committerKalle Valo <quic_kvalo@quicinc.com>
Fri, 25 Mar 2022 10:32:25 +0000 (12:32 +0200)
This makes the code clearer since set11nRateFlags currently sets
both the rate flags and chain sel. This may also be required for
QCN550x support, where the rate flags and chain sel are in separate
fields.

This change does not appear to affect the final binary.

Signed-off-by: Wenli Looi <wlooi@ucalgary.ca>
Acked-by: Toke Høiland-Jørgensen <toke@toke.dk>
Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/20220320233010.123106-3-wlooi@ucalgary.ca
drivers/net/wireless/ath/ath9k/ar9002_mac.c
drivers/net/wireless/ath/ath9k/ar9003_mac.c
drivers/net/wireless/ath/ath9k/mac.h

index fba5a84..a8c0e8e 100644 (file)
@@ -301,10 +301,11 @@ ar9002_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
        WRITE_ONCE(ads->ds_ctl5, set11nPktDurRTSCTS(i->rates, 2)
                | set11nPktDurRTSCTS(i->rates, 3));
 
-       WRITE_ONCE(ads->ds_ctl7, set11nRateFlags(i->rates, 0)
-               | set11nRateFlags(i->rates, 1)
-               | set11nRateFlags(i->rates, 2)
-               | set11nRateFlags(i->rates, 3)
+       WRITE_ONCE(ads->ds_ctl7,
+                 set11nRateFlags(i->rates, 0) | set11nChainSel(i->rates, 0)
+               | set11nRateFlags(i->rates, 1) | set11nChainSel(i->rates, 1)
+               | set11nRateFlags(i->rates, 2) | set11nChainSel(i->rates, 2)
+               | set11nRateFlags(i->rates, 3) | set11nChainSel(i->rates, 3)
                | SM(i->rtscts_rate, AR_RTSCTSRate));
 
        WRITE_ONCE(ads->ds_ctl9, SM(i->txpower[1], AR_XmitPower1));
index 5184a0a..ff8ab58 100644 (file)
@@ -144,10 +144,11 @@ ar9003_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
        WRITE_ONCE(ads->ctl16, set11nPktDurRTSCTS(i->rates, 2)
                | set11nPktDurRTSCTS(i->rates, 3));
 
-       WRITE_ONCE(ads->ctl18, set11nRateFlags(i->rates, 0)
-               | set11nRateFlags(i->rates, 1)
-               | set11nRateFlags(i->rates, 2)
-               | set11nRateFlags(i->rates, 3)
+       WRITE_ONCE(ads->ctl18,
+                 set11nRateFlags(i->rates, 0) | set11nChainSel(i->rates, 0)
+               | set11nRateFlags(i->rates, 1) | set11nChainSel(i->rates, 1)
+               | set11nRateFlags(i->rates, 2) | set11nChainSel(i->rates, 2)
+               | set11nRateFlags(i->rates, 3) | set11nChainSel(i->rates, 3)
                | SM(i->rtscts_rate, AR_RTSCTSRate));
 
        WRITE_ONCE(ads->ctl19, AR_Not_Sounding);
index fd6aa49..af44b33 100644 (file)
         |((_series)[_index].RateFlags & ATH9K_RATESERIES_HALFGI ?      \
           AR_GI##_index : 0)                                           \
         |((_series)[_index].RateFlags & ATH9K_RATESERIES_STBC ?        \
-          AR_STBC##_index : 0)                                         \
-        |SM((_series)[_index].ChSel, AR_ChainSel##_index))
+          AR_STBC##_index : 0))
+
+#define set11nChainSel(_series, _index)                                        \
+       (SM((_series)[_index].ChSel, AR_ChainSel##_index))
 
 #define CCK_SIFS_TIME        10
 #define CCK_PREAMBLE_BITS   144