mt76: extend DT rate power limits to support 11ax devices
authorShayne Chen <shayne.chen@mediatek.com>
Tue, 13 Apr 2021 09:08:37 +0000 (11:08 +0200)
committerFelix Fietkau <nbd@nbd.name>
Wed, 21 Apr 2021 09:42:21 +0000 (11:42 +0200)
Enable parsing per-rate txpower limits from DT for 11ax chipsets.

Co-developed-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Tested-by: Evelyn Tsai <evelyn.tsai@mediatek.com>
Signed-off-by: Shayne Chen <shayne.chen@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
drivers/net/wireless/mediatek/mt76/eeprom.c
drivers/net/wireless/mediatek/mt76/mt76.h

index 2dbc371..6f75e94 100644 (file)
@@ -221,6 +221,36 @@ mt76_apply_array_limit(s8 *pwr, size_t pwr_len, const __be32 *data,
        }
 }
 
+static void
+mt76_apply_multi_array_limit(s8 *pwr, size_t pwr_len, s8 pwr_num,
+                            const __be32 *data, size_t len, s8 target_power,
+                            s8 nss_delta, s8 *max_power)
+{
+       int i, cur;
+
+       if (!data)
+               return;
+
+       len /= 4;
+       cur = be32_to_cpu(data[0]);
+       for (i = 0; i < pwr_num; i++) {
+               if (len < pwr_len + 1)
+                       break;
+
+               mt76_apply_array_limit(pwr + pwr_len * i, pwr_len, data + 1,
+                                      target_power, nss_delta, max_power);
+               if (--cur > 0)
+                       continue;
+
+               data += pwr_len + 1;
+               len -= pwr_len + 1;
+               if (!len)
+                       break;
+
+               cur = be32_to_cpu(data[0]);
+       }
+}
+
 s8 mt76_get_rate_power_limits(struct mt76_phy *phy,
                              struct ieee80211_channel *chan,
                              struct mt76_power_limits *dest,
@@ -231,9 +261,9 @@ s8 mt76_get_rate_power_limits(struct mt76_phy *phy,
        const __be32 *val;
        char name[16];
        u32 mcs_rates = dev->drv->mcs_rates;
+       u32 ru_rates = ARRAY_SIZE(dest->ru[0]);
        char band;
        size_t len;
-       int i, cur;
        s8 max_power = 0;
        s8 txs_delta;
 
@@ -281,28 +311,14 @@ s8 mt76_get_rate_power_limits(struct mt76_phy *phy,
                               target_power, txs_delta, &max_power);
 
        val = mt76_get_of_array(np, "rates-mcs", &len, mcs_rates + 1);
-       if (!val)
-               return max_power;
-
-       len /= 4;
-       cur = be32_to_cpu(val[0]);
-       for (i = 0; i < ARRAY_SIZE(dest->mcs); i++) {
-               if (len < mcs_rates + 1)
-                       break;
-
-               mt76_apply_array_limit(dest->mcs[i], ARRAY_SIZE(dest->mcs[i]),
-                                      val + 1, target_power, txs_delta,
-                                      &max_power);
-               if (--cur > 0)
-                       continue;
-
-               val += mcs_rates + 1;
-               len -= mcs_rates + 1;
-               if (!len)
-                       break;
-
-               cur = be32_to_cpu(val[0]);
-       }
+       mt76_apply_multi_array_limit(dest->mcs[0], ARRAY_SIZE(dest->mcs[0]),
+                                    ARRAY_SIZE(dest->mcs), val, len,
+                                    target_power, txs_delta, &max_power);
+
+       val = mt76_get_of_array(np, "rates-ru", &len, ru_rates + 1);
+       mt76_apply_multi_array_limit(dest->ru[0], ARRAY_SIZE(dest->ru[0]),
+                                    ARRAY_SIZE(dest->ru), val, len,
+                                    target_power, txs_delta, &max_power);
 
        return max_power;
 }
index 122a58c..bf049fb 100644 (file)
@@ -716,6 +716,7 @@ struct mt76_power_limits {
        s8 cck[4];
        s8 ofdm[8];
        s8 mcs[4][10];
+       s8 ru[7][12];
 };
 
 enum mt76_phy_type {