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clk: exynos5420: Make exynos5420_plls static
author
Sachin Kamat
<sachin.kamat@linaro.org>
Tue, 6 Aug 2013 11:31:15 +0000
(17:01 +0530)
committer
Mike Turquette
<mturquette@linaro.org>
Thu, 8 Aug 2013 22:57:32 +0000
(15:57 -0700)
'exynos5420_plls' is used only in this file. Make is static.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/samsung/clk-exynos5420.c
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diff --git
a/drivers/clk/samsung/clk-exynos5420.c
b/drivers/clk/samsung/clk-exynos5420.c
index
ca35269
..
872e13d
100644
(file)
--- a/
drivers/clk/samsung/clk-exynos5420.c
+++ b/
drivers/clk/samsung/clk-exynos5420.c
@@
-727,7
+727,7
@@
static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = {
GATE(smmu_mscl2, "smmu_mscl2", "aclk400_mscl", GATE_IP_MSCL, 10, 0, 0),
};
-struct __initdata samsung_pll_clock exynos5420_plls[nr_plls] = {
+st
atic st
ruct __initdata samsung_pll_clock exynos5420_plls[nr_plls] = {
[apll] = PLL(pll_2550, fout_apll, "fout_apll", "fin_pll", APLL_LOCK,
APLL_CON0, NULL),
[cpll] = PLL(pll_2550, fout_mpll, "fout_mpll", "fin_pll", MPLL_LOCK,