struct zink_shader *ret = rzalloc(NULL, struct zink_shader);
bool have_psiz = false;
+ ret->has_edgeflags = nir->info.stage == MESA_SHADER_VERTEX &&
+ nir_find_variable_with_location(nir, nir_var_shader_out, VARYING_SLOT_EDGE);
+
ret->sinfo.have_vulkan_memory_model = screen->info.have_KHR_vulkan_memory_model;
util_queue_fence_init(&ret->precompile.fence);
bool default_variants = true;
assert(prog->modules[MESA_SHADER_VERTEX]);
uint32_t variant_hash = prog->last_variant_hash;
+ prog->has_edgeflags = prog->shaders[MESA_SHADER_VERTEX]->has_edgeflags;
for (unsigned i = 0; i < MESA_SHADER_COMPUTE; i++) {
if (!(mask & BITFIELD_BIT(i)))
continue;
prog->gfx_hash = gfx_hash;
prog->base.removed = true;
+ prog->has_edgeflags = prog->shaders[MESA_SHADER_VERTEX] &&
+ prog->shaders[MESA_SHADER_VERTEX]->has_edgeflags;
for (int i = 0; i < ZINK_GFX_SHADER_COUNT; ++i) {
util_dynarray_init(&prog->shader_cache[i][0][0], prog);
util_dynarray_init(&prog->shader_cache[i][0][1], prog);
bool bindless;
bool can_inline;
bool has_uniforms;
+ bool has_edgeflags;
struct spirv_shader *spirv;
struct {
unsigned inlined_variant_count[ZINK_GFX_SHADER_COUNT];
uint32_t default_variant_hash;
uint8_t inline_variants; //which stages are using inlined uniforms
+ bool has_edgeflags;
/* separable */
struct zink_gfx_program *full_prog;