s5pc110: mmc: support 8-bit bus width and modify delay
authorJaehoon Chung <jh80.chung@samsung.com>
Mon, 26 Jul 2010 07:16:54 +0000 (16:16 +0900)
committerJaehoon Chung <jh80.chung@samsung.com>
Mon, 26 Jul 2010 07:16:54 +0000 (16:16 +0900)
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
arch/arm/include/asm/arch-s5pc1xx/mmc.h
drivers/mmc/s5p_mmc.c

index ac560c2..ceddaad 100644 (file)
 #ifndef __ASM_ARCH_MMC_H_
 #define __ASM_ARCH_MMC_H_
 
+#define RX_DELAY1      ((0 << 15) | (1 << 7))
+#define RX_DELAY2      ((1 << 15) | (1 << 7))
+#define RX_DELAY3      ((0 << 15) | (0 << 7))
+#define RX_DELAY4      ((1 << 15) | (0 << 7))
+
+#define TX_DELAY1      (RX_DELAY1 << 16)
+#define TX_DELAY2      (RX_DELAY2 << 16)
+#define TX_DELAY3      (RX_DELAY3 << 16)
+#define TX_DELAY4      (RX_DELAY4 << 16)
+
 #ifndef __ASSEMBLY__
 struct s5p_mmc {
        unsigned int    sysad;
index b8c17e0..b988fdc 100644 (file)
@@ -360,18 +360,30 @@ static void mmc_set_ios(struct mmc *mmc)
         *      10 = Delay4 (inverter delay + 2ns)
         */
 
-       writel(0x80800000, &host->reg->control3);
+       if (mmc->boot_config & 0x7)
+               val = TX_DELAY2 | RX_DELAY2;
+       else
+               val = TX_DELAY2 | RX_DELAY3;
+
+       writel(val, &host->reg->control3);
+
 
        mmc_change_clock(host, mmc->clock);
 
        ctrl = readb(&host->reg->hostctl);
 
        /*
+        * WIDE8[5]
+        * 0 = Depend on WIDE4
+        * 1 = 8-bit mode
+        *
         * WIDE4[1]
         * 1 = 4-bit mode
         * 0 = 1-bit mode
         */
-       if (mmc->bus_width == 4)
+       if (mmc->bus_width == 8)
+               ctrl |= (1 << 5);
+       else if (mmc->bus_width == 4)
                ctrl |= (1 << 1);
        else
                ctrl &= ~(1 << 1);