arm64: dts: renesas: r9a07g054: Add USB2.0 phy and host support

Add USB2.0 phy and host support to RZ/V2L (R9A07G054) SoC DTSI.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220227203744.18355-11-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

diff --git a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
index e3a9f78..7d9ea17 100644 (file)
--- a/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a07g054.dtsi
@@ -652,38 +652,98 @@
                };
 
                phyrst: usbphy-ctrl@11c40000 {
+                       compatible = "renesas,r9a07g054-usbphy-ctrl",
+                                    "renesas,rzg2l-usbphy-ctrl";
                        reg = <0 0x11c40000 0 0x10000>;
-                       /* place holder */
+                       clocks = <&cpg CPG_MOD R9A07G054_USB_PCLK>;
+                       resets = <&cpg R9A07G054_USB_PRESETN>;
+                       power-domains = <&cpg>;
+                       #reset-cells = <1>;
+                       status = "disabled";
                };
 
                ohci0: usb@11c50000 {
+                       compatible = "generic-ohci";
                        reg = <0 0x11c50000 0 0x100>;
-                       /* place holder */
+                       interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A07G054_USB_PCLK>,
+                                <&cpg CPG_MOD R9A07G054_USB_U2H0_HCLK>;
+                       resets = <&phyrst 0>,
+                                <&cpg R9A07G054_USB_U2H0_HRESETN>;
+                       phys = <&usb2_phy0 1>;
+                       phy-names = "usb";
+                       power-domains = <&cpg>;
+                       status = "disabled";
                };
 
                ohci1: usb@11c70000 {
+                       compatible = "generic-ohci";
                        reg = <0 0x11c70000 0 0x100>;
-                       /* place holder */
+                       interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A07G054_USB_PCLK>,
+                                <&cpg CPG_MOD R9A07G054_USB_U2H1_HCLK>;
+                       resets = <&phyrst 1>,
+                                <&cpg R9A07G054_USB_U2H1_HRESETN>;
+                       phys = <&usb2_phy1 1>;
+                       phy-names = "usb";
+                       power-domains = <&cpg>;
+                       status = "disabled";
                };
 
                ehci0: usb@11c50100 {
+                       compatible = "generic-ehci";
                        reg = <0 0x11c50100 0 0x100>;
-                       /* place holder */
+                       interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A07G054_USB_PCLK>,
+                                <&cpg CPG_MOD R9A07G054_USB_U2H0_HCLK>;
+                       resets = <&phyrst 0>,
+                                <&cpg R9A07G054_USB_U2H0_HRESETN>;
+                       phys = <&usb2_phy0 2>;
+                       phy-names = "usb";
+                       companion = <&ohci0>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
                };
 
                ehci1: usb@11c70100 {
+                       compatible = "generic-ehci";
                        reg = <0 0x11c70100 0 0x100>;
-                       /* place holder */
+                       interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A07G054_USB_PCLK>,
+                                <&cpg CPG_MOD R9A07G054_USB_U2H1_HCLK>;
+                       resets = <&phyrst 1>,
+                                <&cpg R9A07G054_USB_U2H1_HRESETN>;
+                       phys = <&usb2_phy1 2>;
+                       phy-names = "usb";
+                       companion = <&ohci1>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
                };
 
                usb2_phy0: usb-phy@11c50200 {
+                       compatible = "renesas,usb2-phy-r9a07g054",
+                                    "renesas,rzg2l-usb2-phy";
                        reg = <0 0x11c50200 0 0x700>;
-                       /* place holder */
+                       interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A07G054_USB_PCLK>,
+                                <&cpg CPG_MOD R9A07G054_USB_U2H0_HCLK>;
+                       resets = <&phyrst 0>;
+                       #phy-cells = <1>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
                };
 
                usb2_phy1: usb-phy@11c70200 {
+                       compatible = "renesas,usb2-phy-r9a07g054",
+                                    "renesas,rzg2l-usb2-phy";
                        reg = <0 0x11c70200 0 0x700>;
-                       /* place holder */
+                       interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD R9A07G054_USB_PCLK>,
+                                <&cpg CPG_MOD R9A07G054_USB_U2H1_HCLK>;
+                       resets = <&phyrst 1>;
+                       #phy-cells = <1>;
+                       power-domains = <&cpg>;
+                       status = "disabled";
                };
 
                hsusb: usb@11c60000 {