Say Y here if you want kernel low-level debugging support
on i.MX6Q UART4.
+ config DEBUG_MMP_UART2
+ bool "Kernel low-level debugging message via MMP UART2"
+ depends on ARCH_MMP
+ help
+ Say Y here if you want kernel low-level debugging support
+ on MMP UART2.
+
+ config DEBUG_MMP_UART3
+ bool "Kernel low-level debugging message via MMP UART3"
+ depends on ARCH_MMP
+ help
+ Say Y here if you want kernel low-level debugging support
+ on MMP UART3.
+
config DEBUG_MSM_UART1
bool "Kernel low-level debugging messages via MSM UART1"
depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
up {
label = "Up";
- gpios = <&gpx2 0 0 0 2>;
+ gpios = <&gpx2 0 0 0x10000 2>;
linux,code = <103>;
};
down {
label = "Down";
- gpios = <&gpx2 1 0 0 2>;
+ gpios = <&gpx2 1 0 0x10000 2>;
linux,code = <108>;
};
back {
label = "Back";
- gpios = <&gpx1 7 0 0 2>;
+ gpios = <&gpx1 7 0 0x10000 2>;
linux,code = <158>;
};
home {
label = "Home";
- gpios = <&gpx1 6 0 0 2>;
+ gpios = <&gpx1 6 0 0x10000 2>;
linux,code = <102>;
};
menu {
label = "Menu";
- gpios = <&gpx1 5 0 0 2>;
+ gpios = <&gpx1 5 0 0x10000 2>;
linux,code = <139>;
};
};
+ leds {
+ compatible = "gpio-leds";
+ status {
+ gpios = <&gpx1 3 0 0x10000 2>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
keypad@100A0000 {
status = "disabled";
};
CONFIG_SERIAL_SH_SCI_CONSOLE=y
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
+CONFIG_I2C_GPIO=y
CONFIG_I2C_SH_MOBILE=y
# CONFIG_HWMON is not set
CONFIG_MEDIA_SUPPORT=y
CONFIG_MMC=y
CONFIG_MMC_SDHI=y
CONFIG_MMC_SH_MMCIF=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_S35390A=y
CONFIG_DMADEVICES=y
CONFIG_SH_DMAE=y
CONFIG_UIO=y
# CONFIG_HW_RANDOM is not set
CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
+CONFIG_THERMAL=y
+CONFIG_RCAR_THERMAL=y
CONFIG_SSB=y
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS2,38400 mem=128M user_debug=255"
+CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.1.100:/nfsroot/ ip=192.168.1.101:192.168.1.100::255.255.255.0::eth0:on console=ttyS2,38400 mem=128M user_debug=255 earlyprintk"
CONFIG_VFP=y
CONFIG_NET=y
CONFIG_PACKET=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_DYNAMIC_DEBUG is not set
CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_MMP_UART3=y
+CONFIG_EARLY_PRINTK=y
CONFIG_DEBUG_ERRORS=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRC_CCITT=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.2.100:/nfsroot/ ip=192.168.2.101:192.168.2.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=128M"
+CONFIG_CMDLINE="root=/dev/nfs rootfstype=nfs nfsroot=192.168.2.100:/nfsroot/ ip=192.168.2.101:192.168.2.100::255.255.255.0::eth0:on console=ttyS0,115200 mem=128M earlyprintk"
CONFIG_FPE_NWFPE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_DEBUG_USER=y
CONFIG_DEBUG_ERRORS=y
CONFIG_DEBUG_LL=y
+CONFIG_DEBUG_MMP_UART2=y
+CONFIG_EARLY_PRINTK=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRC_CCITT=y
select EXYNOS4_SETUP_KEYPAD
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
+ select S3C24XX_PWM
help
Machine support for Samsung SMDKV310
select EXYNOS4_SETUP_FIMD0
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
+ select S3C24XX_PWM
help
Machine support for ORIGEN based on Samsung EXYNOS4210
select EXYNOS4_SETUP_KEYPAD
select EXYNOS4_SETUP_SDHCI
select EXYNOS4_SETUP_USB_PHY
+ select S3C24XX_PWM
help
Machine support for Samsung SMDK4212
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/input.h>
+#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/gpio_keys.h>
#include <linux/i2c.h>
.dev.platform_data = &origen_lcd_hv070wsa_data,
};
+static struct pwm_lookup origen_pwm_lookup[] = {
+ PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL),
+};
+
#ifdef CONFIG_DRM_EXYNOS
static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
.panel = {
platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
+ pwm_add_table(origen_pwm_lookup, ARRAY_SIZE(origen_pwm_lookup));
samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
origen_bt_setup();
#include <linux/mfd/max8997.h>
#include <linux/mmc/host.h>
#include <linux/platform_device.h>
+#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/regulator/machine.h>
#include <linux/serial_core.h>
.pwm_period_ns = 1000,
};
+static struct pwm_lookup smdk4x12_pwm_lookup[] = {
+ PWM_LOOKUP("s3c24xx-pwm.1", 0, "pwm-backlight.0", NULL),
+};
+
static uint32_t smdk4x12_keymap[] __initdata = {
/* KEY(row, col, keycode) */
KEY(1, 3, KEY_1), KEY(1, 4, KEY_2), KEY(1, 5, KEY_3),
ARRAY_SIZE(smdk4x12_i2c_devs7));
samsung_bl_set(&smdk4x12_bl_gpio_info, &smdk4x12_bl_data);
+ pwm_add_table(smdk4x12_pwm_lookup, ARRAY_SIZE(smdk4x12_pwm_lookup));
samsung_keypad_set_platdata(&smdk4x12_keypad_data);
#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/input.h>
+#include <linux/pwm.h>
#include <linux/pwm_backlight.h>
#include <linux/platform_data/s3c-hsotg.h>
I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
};
+static struct pwm_lookup smdkv310_pwm_lookup[] = {
+ PWM_LOOKUP("s3c24xx-pwm.1", 0, "pwm-backlight.0", NULL),
+};
+
static void s5p_tv_setup(void)
{
/* direct HPD to HDMI chip */
samsung_keypad_set_platdata(&smdkv310_keypad_data);
samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
+ pwm_add_table(smdkv310_pwm_lookup, ARRAY_SIZE(smdkv310_pwm_lookup));
+
#ifdef CONFIG_DRM_EXYNOS
s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
exynos4_fimd0_gpio_setup_24bpp();
select IMX_HAVE_PLATFORM_IMX_FB
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_KEYPAD
+ select IMX_HAVE_PLATFORM_IMX_SSI
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MX2_CAMERA
select IMX_HAVE_PLATFORM_MXC_EHCI
PB21_PF_CSI_HSYNC,
CSI_PWRDWN | GPIO_GPIO | GPIO_OUT,
CSI_RESET | GPIO_GPIO | GPIO_OUT,
+ /* SSI4 */
+ PC16_PF_SSI4_FS,
+ PC17_PF_SSI4_RXD,
+ PC18_PF_SSI4_TXD,
+ PC19_PF_SSI4_CLK,
};
static struct gpio mx27_3ds_camera_gpios[] = {
};
/* MC13783 */
+static struct mc13xxx_codec_platform_data mx27_3ds_codec = {
+ .dac_ssi_port = MC13783_SSI1_PORT,
+ .adc_ssi_port = MC13783_SSI1_PORT,
+};
+
static struct mc13xxx_platform_data mc13783_pdata = {
.regulators = {
.regulators = mx27_3ds_regulators,
.num_regulators = ARRAY_SIZE(mx27_3ds_regulators),
},
- .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC,
+ .flags = MC13XXX_USE_TOUCHSCREEN | MC13XXX_USE_RTC |
+ MC13XXX_USE_CODEC,
+ .codec = &mx27_3ds_codec,
+};
+
+static struct imx_ssi_platform_data mx27_3ds_ssi_pdata = {
+ .flags = IMX_SSI_DMA | IMX_SSI_NET,
};
/* SPI */
}
imx27_add_mx2_camera(&mx27_3ds_cam_pdata);
+ imx27_add_imx_ssi(0, &mx27_3ds_ssi_pdata);
+
+ imx_add_platform_device("imx_mc13783", 0, NULL, 0, NULL, 0);
}
static void __init mx27pdk_timer_init(void)
say 'Y' here if you want your kernel to run on the Brivo
Systems LLC, ACS-5000 Master board.
+config MACH_LITE300
+ bool "SecureComputing SG300"
+ help
+ Say 'Y' here if you want your kernel to support the
+ SecureComputing / SnapGear SG300 VPN Internet Router.
+ See http://www.securecomputing.com for more details.
+
+config MACH_SG310
+ bool "McAfee SG310"
+ help
+ Say 'Y' here if you want your kernel to support the
+ McAfee / SnapGear SG310 VPN Internet Router.
+ See http://www.mcafee.com for more details.
+
+config MACH_SE4200
+ bool "SecureComputing SE4200"
+ help
+ Say 'Y' here if you want your kernel to support the
+ SecureComputing / SnapGear SE4200 Secure Wireless VPN
+ Internet Router.
+ See http://www.securecomputing.com for more details.
+
+config MACH_CM4002
+ bool "OpenGear CM4002"
+ help
+ Say 'Y' here if you want your kernel to support the OpenGear
+ CM4002 Secure Access Server. See http://www.opengear.com for
+ more details.
+
+config MACH_CM4008
+ bool "OpenGear CM4008"
+ select MIGHT_HAVE_PCI
+ help
+ Say 'Y' here if you want your kernel to support the OpenGear
+ CM4008 Console Server. See http://www.opengear.com for more
+ details.
+
+config MACH_CM41xx
+ bool "OpenGear CM41xx"
+ select MIGHT_HAVE_PCI
+ help
+ Say 'Y' here if you want your kernel to support the OpenGear
+ CM4016 or CM4048 Console Servers. See http://www.opengear.com for
+ more details.
+
+config MACH_IM4004
+ bool "OpenGear IM4004"
+ select MIGHT_HAVE_PCI
+ help
+ Say 'Y' here if you want your kernel to support the OpenGear
+ IM4004 Secure Access Server. See http://www.opengear.com for
+ more details.
+
+config MACH_IM42xx
+ bool "OpenGear IM42xx"
+ select MIGHT_HAVE_PCI
+ help
+ Say 'Y' here if you want your kernel to support the OpenGear
+ IM4216 or IM4248 Console Servers. See http://www.opengear.com for
+ more details.
+
endmenu
endif
obj-$(CONFIG_MACH_KS8695) += board-micrel.o
obj-$(CONFIG_MACH_DSM320) += board-dsm320.o
obj-$(CONFIG_MACH_ACS5K) += board-acs5k.o
+obj-$(CONFIG_MACH_LITE300) += board-sg.o
+obj-$(CONFIG_MACH_SG310) += board-sg.o
+obj-$(CONFIG_MACH_SE4200) += board-sg.o
+obj-$(CONFIG_MACH_CM4002) += board-og.o
+obj-$(CONFIG_MACH_CM4008) += board-og.o
+obj-$(CONFIG_MACH_CM41xx) += board-og.o
+obj-$(CONFIG_MACH_IM4004) += board-og.o
+obj-$(CONFIG_MACH_IM42xx) += board-og.o
--- /dev/null
+/*
+ * board-og.c -- support for the OpenGear KS8695 based boards.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/platform_device.h>
+#include <linux/serial_8250.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <mach/devices.h>
+#include <mach/regs-gpio.h>
+#include <mach/gpio-ks8695.h>
+#include "generic.h"
+
+static int og_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+{
+ if (machine_is_im4004() && (slot == 8))
+ return KS8695_IRQ_EXTERN1;
+ return KS8695_IRQ_EXTERN0;
+}
+
+static struct ks8695_pci_cfg __initdata og_pci = {
+ .mode = KS8695_MODE_PCI,
+ .map_irq = og_pci_map_irq,
+};
+
+static void __init og_register_pci(void)
+{
+ /* Initialize the GPIO lines for interrupt mode */
+ ks8695_gpio_interrupt(KS8695_GPIO_0, IRQ_TYPE_LEVEL_LOW);
+
+ /* Cardbus Slot */
+ if (machine_is_im4004())
+ ks8695_gpio_interrupt(KS8695_GPIO_1, IRQ_TYPE_LEVEL_LOW);
+
+ ks8695_init_pci(&og_pci);
+}
+
+/*
+ * The PCI bus reset is driven by a dedicated GPIO line. Toggle it here
+ * and bring the PCI bus out of reset.
+ */
+static void __init og_pci_bus_reset(void)
+{
+ unsigned int rstline = 1;
+
+ /* Some boards use a different GPIO as the PCI reset line */
+ if (machine_is_im4004())
+ rstline = 2;
+ else if (machine_is_im42xx())
+ rstline = 0;
+
+ gpio_request(rstline, "PCI reset");
+ gpio_direction_output(rstline, 0);
+
+ /* Drive a reset on the PCI reset line */
+ gpio_set_value(rstline, 1);
+ gpio_set_value(rstline, 0);
+ mdelay(100);
+ gpio_set_value(rstline, 1);
+ mdelay(100);
+}
+
+/*
+ * Direct connect serial ports (non-PCI that is).
+ */
+#define S8250_PHYS 0x03800000
+#define S8250_VIRT 0xf4000000
+#define S8250_SIZE 0x00100000
+
+static struct __initdata map_desc og_io_desc[] = {
+ {
+ .virtual = S8250_VIRT,
+ .pfn = __phys_to_pfn(S8250_PHYS),
+ .length = S8250_SIZE,
+ .type = MT_DEVICE,
+ }
+};
+
+static struct resource og_uart_resources[] = {
+ {
+ .start = S8250_VIRT,
+ .end = S8250_VIRT + S8250_SIZE,
+ .flags = IORESOURCE_MEM
+ },
+};
+
+static struct plat_serial8250_port og_uart_data[] = {
+ {
+ .mapbase = S8250_VIRT,
+ .membase = (char *) S8250_VIRT,
+ .irq = 3,
+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
+ .iotype = UPIO_MEM,
+ .regshift = 2,
+ .uartclk = 115200 * 16,
+ },
+ { },
+};
+
+static struct platform_device og_uart = {
+ .name = "serial8250",
+ .id = 0,
+ .dev.platform_data = og_uart_data,
+ .num_resources = 1,
+ .resource = og_uart_resources
+};
+
+static struct platform_device *og_devices[] __initdata = {
+ &og_uart
+};
+
+static void __init og_init(void)
+{
+ ks8695_register_gpios();
+
+ if (machine_is_cm4002()) {
+ ks8695_gpio_interrupt(KS8695_GPIO_1, IRQ_TYPE_LEVEL_HIGH);
+ iotable_init(og_io_desc, ARRAY_SIZE(og_io_desc));
+ platform_add_devices(og_devices, ARRAY_SIZE(og_devices));
+ } else {
+ og_pci_bus_reset();
+ og_register_pci();
+ }
+
+ ks8695_add_device_lan();
+ ks8695_add_device_wan();
+}
+
+#ifdef CONFIG_MACH_CM4002
+MACHINE_START(CM4002, "OpenGear/CM4002")
+ /* OpenGear Inc. */
+ .atag_offset = 0x100,
+ .map_io = ks8695_map_io,
+ .init_irq = ks8695_init_irq,
+ .init_machine = og_init,
+ .timer = &ks8695_timer,
+ .restart = ks8695_restart,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_CM4008
+MACHINE_START(CM4008, "OpenGear/CM4008")
+ /* OpenGear Inc. */
+ .atag_offset = 0x100,
+ .map_io = ks8695_map_io,
+ .init_irq = ks8695_init_irq,
+ .init_machine = og_init,
+ .timer = &ks8695_timer,
+ .restart = ks8695_restart,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_CM41xx
+MACHINE_START(CM41XX, "OpenGear/CM41xx")
+ /* OpenGear Inc. */
+ .atag_offset = 0x100,
+ .map_io = ks8695_map_io,
+ .init_irq = ks8695_init_irq,
+ .init_machine = og_init,
+ .timer = &ks8695_timer,
+ .restart = ks8695_restart,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_IM4004
+MACHINE_START(IM4004, "OpenGear/IM4004")
+ /* OpenGear Inc. */
+ .atag_offset = 0x100,
+ .map_io = ks8695_map_io,
+ .init_irq = ks8695_init_irq,
+ .init_machine = og_init,
+ .timer = &ks8695_timer,
+ .restart = ks8695_restart,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_IM42xx
+MACHINE_START(IM42XX, "OpenGear/IM42xx")
+ /* OpenGear Inc. */
+ .atag_offset = 0x100,
+ .map_io = ks8695_map_io,
+ .init_irq = ks8695_init_irq,
+ .init_machine = og_init,
+ .timer = &ks8695_timer,
+ .restart = ks8695_restart,
+MACHINE_END
+#endif
--- /dev/null
+/*
+ * board-sg.c -- support for the SnapGear KS8695 based boards
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/physmap.h>
+#include <linux/mtd/partitions.h>
+#include <asm/mach-types.h>
+#include <asm/mach/arch.h>
+#include <mach/devices.h>
+#include "generic.h"
+
+/*
+ * The SG310 machine type is fitted with a conventional 8MB Strataflash
+ * device. Define its partitioning.
+ */
+#define FL_BASE 0x02000000
+#define FL_SIZE SZ_8M
+
+static struct mtd_partition sg_mtd_partitions[] = {
+ [0] = {
+ .name = "SnapGear Boot Loader",
+ .size = SZ_128K,
+ },
+ [1] = {
+ .name = "SnapGear non-volatile configuration",
+ .size = SZ_512K,
+ .offset = SZ_256K,
+ },
+ [2] = {
+ .name = "SnapGear image",
+ .offset = SZ_512K + SZ_256K,
+ },
+ [3] = {
+ .name = "SnapGear StrataFlash",
+ },
+ [4] = {
+ .name = "SnapGear Boot Tags",
+ .size = SZ_128K,
+ .offset = SZ_128K,
+ },
+};
+
+static struct physmap_flash_data sg_mtd_pdata = {
+ .width = 1,
+ .nr_parts = ARRAY_SIZE(sg_mtd_partitions),
+ .parts = sg_mtd_partitions,
+};
+
+
+static struct resource sg_mtd_resource[] = {
+ [0] = {
+ .start = FL_BASE,
+ .end = FL_BASE + FL_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device sg_mtd_device = {
+ .name = "physmap-flash",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(sg_mtd_resource),
+ .resource = sg_mtd_resource,
+ .dev = {
+ .platform_data = &sg_mtd_pdata,
+ },
+};
+
+static void __init sg_init(void)
+{
+ ks8695_add_device_lan();
+ ks8695_add_device_wan();
+
+ if (machine_is_sg310())
+ platform_device_register(&sg_mtd_device);
+}
+
+#ifdef CONFIG_MACH_LITE300
+MACHINE_START(LITE300, "SecureComputing/SG300")
+ /* SnapGear */
+ .atag_offset = 0x100,
+ .map_io = ks8695_map_io,
+ .init_irq = ks8695_init_irq,
+ .init_machine = sg_init,
+ .timer = &ks8695_timer,
+ .restart = ks8695_restart,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_SG310
+MACHINE_START(SG310, "McAfee/SG310")
+ /* SnapGear */
+ .atag_offset = 0x100,
+ .map_io = ks8695_map_io,
+ .init_irq = ks8695_init_irq,
+ .init_machine = sg_init,
+ .timer = &ks8695_timer,
+ .restart = ks8695_restart,
+MACHINE_END
+#endif
+
+#ifdef CONFIG_MACH_SE4200
+MACHINE_START(SE4200, "SecureComputing/SE4200")
+ /* SnapGear */
+ .atag_offset = 0x100,
+ .map_io = ks8695_map_io,
+ .init_irq = ks8695_init_irq,
+ .init_machine = sg_init,
+ .timer = &ks8695_timer,
+ .restart = ks8695_restart,
+MACHINE_END
+#endif
* published by the Free Software Foundation.
*/
+#if defined(CONFIG_DEBUG_MMP_UART2)
+#define MMP_UART_OFFSET 0x00017000
+#elif defined(CONFIG_DEBUG_MMP_UART3)
+#define MMP_UART_OFFSET 0x00018000
+#else
+#error "Select uart for DEBUG_LL"
+#endif
+
#include <mach/addr-map.h>
.macro addruart, rp, rv, tmp
ldr \rp, =APB_PHYS_BASE @ physical
ldr \rv, =APB_VIRT_BASE @ virtual
- orr \rp, \rp, #0x00017000
- orr \rv, \rv, #0x00017000
+ orr \rp, \rp, #MMP_UART_OFFSET
+ orr \rv, \rv, #MMP_UART_OFFSET
.endm
#define UART_SHIFT 2
#endif
#endif
+#ifdef CONFIG_MTD_NAND_PXA3xx
+static struct pxa3xx_nand_platform_data dkb_nand_info = {
+ .enable_arbiter = 1,
+ .num_cs = 1,
+};
+#endif
+
static void __init ttc_dkb_init(void)
{
mfp_config(ARRAY_AND_SIZE(ttc_dkb_pin_config));
/* on-chip devices */
pxa910_add_uart(1);
+#ifdef CONFIG_MTD_NAND_PXA3xx
+ pxa910_add_nand(&dkb_nand_info);
+#endif
/* off-chip devices */
pxa910_add_twsi(0, NULL, ARRAY_AND_SIZE(ttc_dkb_i2c_info));
if ARCH_MSM
+comment "Qualcomm MSM SoC Type"
+ depends on (ARCH_MSM8X60 || ARCH_MSM8960)
+
choice
prompt "Qualcomm MSM SoC Type"
default ARCH_MSM7X00A
+ depends on !(ARCH_MSM8X60 || ARCH_MSM8960)
config ARCH_MSM7X00A
bool "MSM7x00A / MSM7x01A"
select GPIO_MSM_V1
select MSM_PROC_COMM
+endchoice
+
config ARCH_MSM8X60
bool "MSM8X60"
select ARCH_MSM_SCORPIONMP
select MSM_SCM if SMP
select USE_OF
-endchoice
-
config MSM_HAS_DEBUG_UART_HS
bool
#define MSM8X60_QGIC_CPU_PHYS 0x02081000
#define MSM8X60_QGIC_CPU_SIZE SZ_4K
-#define MSM_ACC_BASE IOMEM(0xF0002000)
-#define MSM_ACC_PHYS 0x02001000
-#define MSM_ACC_SIZE SZ_4K
-
-#define MSM_GCC_BASE IOMEM(0xF0003000)
-#define MSM_GCC_PHYS 0x02082000
-#define MSM_GCC_SIZE SZ_4K
-
#define MSM_TLMM_BASE IOMEM(0xF0004000)
#define MSM_TLMM_PHYS 0x00800000
#define MSM_TLMM_SIZE SZ_16K
-#define MSM_SHARED_RAM_BASE IOMEM(0xF0100000)
-#define MSM_SHARED_RAM_SIZE SZ_1M
-
#define MSM8X60_TMR_PHYS 0x02000000
#define MSM8X60_TMR_SIZE SZ_4K
#include "msm_iomap-7x30.h"
#elif defined(CONFIG_ARCH_QSD8X50)
#include "msm_iomap-8x50.h"
-#elif defined(CONFIG_ARCH_MSM8X60)
-#include "msm_iomap-8x60.h"
#else
#include "msm_iomap-7x00.h"
#endif
+#include "msm_iomap-8x60.h"
#include "msm_iomap-8960.h"
#define MSM_DEBUG_UART_SIZE SZ_4K
MSM_CHIP_DEVICE(QGIC_CPU, MSM8X60),
MSM_CHIP_DEVICE(TMR, MSM8X60),
MSM_CHIP_DEVICE(TMR0, MSM8X60),
- MSM_DEVICE(ACC),
- MSM_DEVICE(GCC),
#ifdef CONFIG_DEBUG_MSM8660_UART
MSM_DEVICE(DEBUG_UART),
#endif
#include <linux/mfd/wm831x/irq.h>
#include <linux/mfd/wm831x/gpio.h>
#include <linux/mfd/wm8994/pdata.h>
+#include <linux/mfd/arizona/pdata.h>
#include <linux/regulator/machine.h>
},
};
-static const struct i2c_board_info wm5102_devs[] = {
- { I2C_BOARD_INFO("wm5102", 0x1a),
- .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2, },
+static struct arizona_pdata wm5102_pdata = {
+ .ldoena = S3C64XX_GPN(7),
+ .gpio_base = CODEC_GPIO_BASE,
+ .irq_active_high = true,
+ .micd_pol_gpio = CODEC_GPIO_BASE + 4,
+ .gpio_defaults = {
+ [2] = 0x10000, /* AIF3TXLRCLK */
+ [3] = 0x4, /* OPCLK */
+ },
+};
+
+static struct s3c64xx_spi_csinfo wm5102_spi_csinfo = {
+ .line = S3C64XX_GPN(5),
+};
+
+static struct spi_board_info wm5102_spi_devs[] = {
+ [0] = {
+ .modalias = "wm5102",
+ .max_speed_hz = 10 * 1000 * 1000,
+ .bus_num = 0,
+ .chip_select = 0,
+ .mode = SPI_MODE_0,
+ .irq = GLENFARCLAS_PMIC_IRQ_BASE +
+ WM831X_IRQ_GPIO_2,
+ .controller_data = &wm5102_spi_csinfo,
+ .platform_data = &wm5102_pdata,
+ },
};
static const struct i2c_board_info wm6230_i2c_devs[] = {
{ .id = 0x3c, .name = "1273-EV1 Longmorn" },
{ .id = 0x3d, .name = "1277-EV1 Littlemill",
.i2c_devs = wm1277_devs, .num_i2c_devs = ARRAY_SIZE(wm1277_devs) },
- { .id = 0x3e, .name = "WM5102-6271-EV1-CS127",
- .i2c_devs = wm5102_devs, .num_i2c_devs = ARRAY_SIZE(wm5102_devs) },
+ { .id = 0x3e, .name = "WM5102-6271-EV1-CS127 Amrut",
+ .spi_devs = wm5102_spi_devs,
+ .num_spi_devs = ARRAY_SIZE(wm5102_spi_devs) },
};
static __devinit int wlf_gf_module_probe(struct i2c_client *i2c,
.id = -1,
};
+static struct platform_device bells_wm5102_device = {
+ .name = "bells",
+ .id = 0,
+};
+
+static struct platform_device bells_wm5110_device = {
+ .name = "bells",
+ .id = 1,
+};
+
static struct regulator_consumer_supply wallvdd_consumers[] = {
REGULATOR_SUPPLY("SPKVDD", "1-001a"),
REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
&tobermory_device,
&littlemill_device,
&lowland_device,
+ &bells_wm5102_device,
+ &bells_wm5110_device,
&wallvdd_device,
};
#include <linux/mmc/host.h>
#include <linux/mmc/sh_mmcif.h>
#include <linux/mmc/sh_mobile_sdhi.h>
+#include <linux/i2c-gpio.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <mach/r8a7740.h>
},
};
+/* RTC: RTC connects i2c-gpio. */
+static struct i2c_gpio_platform_data i2c_gpio_data = {
+ .sda_pin = GPIO_PORT208,
+ .scl_pin = GPIO_PORT91,
+ .udelay = 5, /* 100 kHz */
+};
+
+static struct platform_device i2c_gpio_device = {
+ .name = "i2c-gpio",
+ .id = 2,
+ .dev = {
+ .platform_data = &i2c_gpio_data,
+ },
+};
+
/* I2C */
static struct i2c_board_info i2c0_devices[] = {
{
},
};
+static struct i2c_board_info i2c2_devices[] = {
+ {
+ I2C_BOARD_INFO("s35390a", 0x30),
+ .type = "s35390a",
+ },
+};
+
/*
* board devices
*/
&fsi_device,
&fsi_wm8978_device,
&fsi_hdmi_device,
+ &i2c_gpio_device,
};
static void __init eva_clock_init(void)
#endif
i2c_register_board_info(0, i2c0_devices, ARRAY_SIZE(i2c0_devices));
+ i2c_register_board_info(2, i2c2_devices, ARRAY_SIZE(i2c2_devices));
r8a7740_add_standard_devices();
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
+#include <linux/mmc/sh_mobile_sdhi.h>
+#include <linux/mfd/tmio.h>
#include <mach/hardware.h>
#include <mach/r8a7779.h>
#include <mach/common.h>
#include <asm/hardware/gic.h>
#include <asm/traps.h>
+/* Fixed 3.3V regulator to be used by SDHI0 */
+static struct regulator_consumer_supply fixed3v3_power_consumers[] = {
+ REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"),
+ REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"),
+};
+
/* Dummy supplies, where voltage doesn't matter */
static struct regulator_consumer_supply dummy_supplies[] = {
REGULATOR_SUPPLY("vddvario", "smsc911x"),
.num_resources = ARRAY_SIZE(smsc911x_resources),
};
+static struct resource sdhi0_resources[] = {
+ [0] = {
+ .name = "sdhi0",
+ .start = 0xffe4c000,
+ .end = 0xffe4c0ff,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = gic_spi(104),
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct sh_mobile_sdhi_info sdhi0_platform_data = {
+ .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE | TMIO_MMC_HAS_IDLE_WAIT,
+ .tmio_caps = MMC_CAP_SD_HIGHSPEED,
+};
+
+static struct platform_device sdhi0_device = {
+ .name = "sh_mobile_sdhi",
+ .num_resources = ARRAY_SIZE(sdhi0_resources),
+ .resource = sdhi0_resources,
+ .id = 0,
+ .dev = {
+ .platform_data = &sdhi0_platform_data,
+ }
+};
+
+/* Thermal */
+static struct resource thermal_resources[] = {
+ [0] = {
+ .start = 0xFFC48000,
+ .end = 0xFFC48038 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device thermal_device = {
+ .name = "rcar_thermal",
+ .resource = thermal_resources,
+ .num_resources = ARRAY_SIZE(thermal_resources),
+};
+
static struct platform_device *marzen_devices[] __initdata = {
ð_device,
+ &sdhi0_device,
+ &thermal_device,
};
static void __init marzen_init(void)
{
- regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
+ regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
+ ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
+ regulator_register_fixed(1, dummy_supplies,
+ ARRAY_SIZE(dummy_supplies));
r8a7779_pinmux_init();
gpio_request(GPIO_FN_EX_CS0, NULL); /* nCS */
gpio_request(GPIO_FN_IRQ1_B, NULL); /* IRQ + PME */
+ /* SD0 (CN20) */
+ gpio_request(GPIO_FN_SD0_CLK, NULL);
+ gpio_request(GPIO_FN_SD0_CMD, NULL);
+ gpio_request(GPIO_FN_SD0_DAT0, NULL);
+ gpio_request(GPIO_FN_SD0_DAT1, NULL);
+ gpio_request(GPIO_FN_SD0_DAT2, NULL);
+ gpio_request(GPIO_FN_SD0_DAT3, NULL);
+ gpio_request(GPIO_FN_SD0_CD, NULL);
+ gpio_request(GPIO_FN_SD0_WP, NULL);
+
r8a7779_add_standard_devices();
platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
}