GFX: Support for Graphics Device ID change in CLV+

BZ: 28684

PCI Device ID for Graphics changed from 0x08C7 in CLV A0 to 0x08C8 in CLV+.
This patch adds support for that change

Change-Id: I8dcbcc3378ea488245a429ddde3399121f60aa31
Signed-off-by: Venkat Jayaraman <venkat.jayaraman@intel.com>
Reviewed-on: http://android.intel.com:8080/40279
Reviewed-by: Renganathan, Prabu <prabu.renganathan@intel.com>
Reviewed-by: Ponnusamy, Siva Prasath <siva.prasath.ponnusamy@intel.com>
Reviewed-by: Dai, Yu <yu.dai@intel.com>
Reviewed-by: Xu, Randy <randy.xu@intel.com>
Tested-by: Xu, Randy <randy.xu@intel.com>
Reviewed-by: buildbot <buildbot@intel.com>
Tested-by: buildbot <buildbot@intel.com>

diff --git a/drivers/staging/mrst/drv/psb_drv.c b/drivers/staging/mrst/drv/psb_drv.c
index bc85b67..553bd04 100644 (file)
--- a/drivers/staging/mrst/drv/psb_drv.c
+++ b/drivers/staging/mrst/drv/psb_drv.c
@@ -198,6 +198,7 @@ static struct pci_device_id pciidlist[] = {
        {0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MDFLD_0130},
        {0x8086, 0x08c0, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xFFFF00, CHIP_MDFLD_0130},
        {0x8086, 0x08c7, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xFFFF00, CHIP_MDFLD_0130},
+       {0x8086, 0x08c8, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA << 8, 0xFFFF00, CHIP_MDFLD_0130},
 #endif
        {0, 0, 0}
 };

diff --git a/drivers/staging/mrst/drv/psb_drv.h b/drivers/staging/mrst/drv/psb_drv.h
index d5394aa..1ac12a0 100644 (file)
--- a/drivers/staging/mrst/drv/psb_drv.h
+++ b/drivers/staging/mrst/drv/psb_drv.h
@@ -1538,7 +1538,8 @@ do {                                                \
 /* pciid: CLV A0 = 0X8C7, CLV B0 = 0X8C8-0X8CB, CLV+ A0/B0 0X8CC-0X8CF.*/
 #define IS_MDFLD_OLD(dev) (((dev)->pci_device & 0xfff8) == 0x0130)
 #define IS_CTP(dev) (((dev->pci_device & 0xffff) == 0x08c0) || \
-                    ((dev->pci_device & 0xffff) == 0x08c7))
+                    ((dev->pci_device & 0xffff) == 0x08c7) ||  \
+                    ((dev->pci_device & 0xffff) == 0x08c8))
 #define IS_MDFLD(dev) (IS_CTP(dev) || IS_MDFLD_OLD(dev))
 #define IS_MID(dev) (IS_MRST(dev) || IS_MDFLD(dev))
 
@@ -1546,7 +1547,8 @@ do {                                                \
 #define IS_TOPAZ(dev) ((IS_MRST(dev) && (((dev)->pci_device & 0xfffc) != PCI_ID_TOPAZ_DISABLED)) || IS_MDFLD(dev))
 
 #define IS_D0(dev) (((dev)->pdev->revision >= 0xc) || \
-               (((dev)->pci_device & 0xffff) == 0x08c7))
+               (((dev)->pci_device & 0xffff) == 0x08c7) || \
+               (((dev)->pci_device & 0xffff) == 0x08c8))
 
 extern int drm_psb_ospm;
 extern int drm_psb_cpurelax;