[AArch64] Remove ISB after FPCR write.

diff --git a/ChangeLog b/ChangeLog
index b20156c..8a55607 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
 2014-06-02  Wilco  <wdijkstr@arm.com>
 
+       * sysdeps/aarch64/fpu/fpu_control.h (_FPU_SETCW): Remove ISB after
+       FPCR write.
+
+2014-06-02  Wilco  <wdijkstr@arm.com>
+
        [BZ #17009]
        * sysdeps/aarch64/fpu/feupdateenv (feupdateenv):
        Rewrite to reduce FPCR/FPSR accesses.

diff --git a/sysdeps/aarch64/fpu/fpu_control.h b/sysdeps/aarch64/fpu/fpu_control.h
index 6a265e8..d5a890d 100644 (file)
--- a/sysdeps/aarch64/fpu/fpu_control.h
+++ b/sysdeps/aarch64/fpu/fpu_control.h
@@ -24,11 +24,8 @@
 #define _FPU_GETCW(fpcr) \
   __asm__ __volatile__ ("mrs   %0, fpcr" : "=r" (fpcr))
 
-#define _FPU_SETCW(fpcr)                                  \
-  {                                                       \
-    __asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr)); \
-    __asm__ __volatile__ ("isb");                         \
-  }
+#define _FPU_SETCW(fpcr) \
+  __asm__ __volatile__ ("msr   fpcr, %0" : : "r" (fpcr))
 
 #define _FPU_GETFPSR(fpsr) \
   __asm__ __volatile__ ("mrs   %0, fpsr" : "=r" (fpsr))