arm64: dts: ls1046a: support SD UHS-I and eMMC HS200 on RDB

This patch is to enable SD UHS-I mode and eMMC HS200 mode on
LS1046ARDB in dts. Also, the eSDHC peripheral clock must be used
instead of platform clock to support these modes.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
index c5361e9..2d28726 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
@@ -72,6 +72,14 @@
        status = "okay";
 };
 
+&esdhc {
+       mmc-hs200-1_8v;
+       sd-uhs-sdr104;
+       sd-uhs-sdr50;
+       sd-uhs-sdr25;
+       sd-uhs-sdr12;
+};
+
 &i2c0 {
        status = "okay";
 

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
index 7ef2b9f..5975d30 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
@@ -210,10 +210,10 @@
                };
 
                esdhc: esdhc@1560000 {
-                       compatible = "fsl,esdhc";
+                       compatible = "fsl,ls1046a-esdhc", "fsl,esdhc";
                        reg = <0x0 0x1560000 0x0 0x10000>;
                        interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
-                       clock-frequency = <0>;
+                       clocks = <&clockgen 2 1>;
                        voltage-ranges = <1800 1800 3300 3300>;
                        sdhci,auto-cmd12;
                        big-endian;