(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar and -> and
(define_insn "*fuse_and_and"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "%r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar andc -> and
(define_insn "*fuse_andc_and"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar eqv -> and
(define_insn "*fuse_eqv_and"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nand -> and
(define_insn "*fuse_nand_and"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nor -> and
(define_insn "*fuse_nor_and"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar or -> and
(define_insn "*fuse_or_and"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar orc -> and
(define_insn "*fuse_orc_and"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar xor -> and
(define_insn "*fuse_xor_and"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; add-logical fusion pattern generated by gen_logical_addsubf
+;; scalar add -> and
+(define_insn "*fuse_add_and"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (and:GPR (plus:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_ADDLOG)"
+ "@
+ add %3,%1,%0\;and %3,%3,%2
+ add %3,%1,%0\;and %3,%3,%2
+ add %3,%1,%0\;and %3,%3,%2
+ add %4,%1,%0\;and %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; add-logical fusion pattern generated by gen_logical_addsubf
+;; scalar subf -> and
+(define_insn "*fuse_subf_and"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (and:GPR (minus:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_ADDLOG)"
+ "@
+ subf %3,%1,%0\;and %3,%3,%2
+ subf %3,%1,%0\;and %3,%3,%2
+ subf %3,%1,%0\;and %3,%3,%2
+ subf %4,%1,%0\;and %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar and -> andc
(define_insn "*fuse_and_andc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar andc -> andc
(define_insn "*fuse_andc_andc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar eqv -> andc
(define_insn "*fuse_eqv_andc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nand -> andc
(define_insn "*fuse_nand_andc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nor -> andc
(define_insn "*fuse_nor_andc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar or -> andc
(define_insn "*fuse_or_andc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar orc -> andc
(define_insn "*fuse_orc_andc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar xor -> andc
(define_insn "*fuse_xor_andc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar and -> eqv
(define_insn "*fuse_and_eqv"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (not:GPR (xor:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (not:GPR (xor:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar andc -> eqv
(define_insn "*fuse_andc_eqv"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (not:GPR (xor:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (not:GPR (xor:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar eqv -> eqv
(define_insn "*fuse_eqv_eqv"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (not:GPR (xor:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (not:GPR (xor:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "%r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nand -> eqv
(define_insn "*fuse_nand_eqv"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (not:GPR (xor:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (not:GPR (xor:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nor -> eqv
(define_insn "*fuse_nor_eqv"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (not:GPR (xor:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (not:GPR (xor:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar or -> eqv
(define_insn "*fuse_or_eqv"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (not:GPR (xor:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (not:GPR (xor:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar orc -> eqv
(define_insn "*fuse_orc_eqv"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (not:GPR (xor:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (not:GPR (xor:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar xor -> eqv
(define_insn "*fuse_xor_eqv"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (not:GPR (xor:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (not:GPR (xor:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar and -> nand
(define_insn "*fuse_and_nand"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (not:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (not:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar andc -> nand
(define_insn "*fuse_andc_nand"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (not:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (not:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar eqv -> nand
(define_insn "*fuse_eqv_nand"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (not:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (not:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nand -> nand
(define_insn "*fuse_nand_nand"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (not:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (not:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nor -> nand
(define_insn "*fuse_nor_nand"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (not:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (not:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar or -> nand
(define_insn "*fuse_or_nand"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (not:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (not:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar orc -> nand
(define_insn "*fuse_orc_nand"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (not:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (not:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar xor -> nand
(define_insn "*fuse_xor_nand"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; add-logical fusion pattern generated by gen_logical_addsubf
+;; scalar add -> nand
+(define_insn "*fuse_add_nand"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (ior:GPR (not:GPR (plus:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
+ (not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_ADDLOG)"
+ "@
+ add %3,%1,%0\;nand %3,%3,%2
+ add %3,%1,%0\;nand %3,%3,%2
+ add %3,%1,%0\;nand %3,%3,%2
+ add %4,%1,%0\;nand %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; add-logical fusion pattern generated by gen_logical_addsubf
+;; scalar subf -> nand
+(define_insn "*fuse_subf_nand"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (ior:GPR (not:GPR (minus:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
+ (not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_ADDLOG)"
+ "@
+ subf %3,%1,%0\;nand %3,%3,%2
+ subf %3,%1,%0\;nand %3,%3,%2
+ subf %3,%1,%0\;nand %3,%3,%2
+ subf %4,%1,%0\;nand %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar and -> nor
(define_insn "*fuse_and_nor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (not:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (not:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar andc -> nor
(define_insn "*fuse_andc_nor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (not:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (not:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar eqv -> nor
(define_insn "*fuse_eqv_nor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (not:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (not:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nand -> nor
(define_insn "*fuse_nand_nor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (not:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (not:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nor -> nor
(define_insn "*fuse_nor_nor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (not:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (not:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar or -> nor
(define_insn "*fuse_or_nor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (not:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (not:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar orc -> nor
(define_insn "*fuse_orc_nor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (not:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (and:GPR (not:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar xor -> nor
(define_insn "*fuse_xor_nor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (and:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; add-logical fusion pattern generated by gen_logical_addsubf
+;; scalar add -> nor
+(define_insn "*fuse_add_nor"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (and:GPR (not:GPR (plus:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
+ (not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_ADDLOG)"
+ "@
+ add %3,%1,%0\;nor %3,%3,%2
+ add %3,%1,%0\;nor %3,%3,%2
+ add %3,%1,%0\;nor %3,%3,%2
+ add %4,%1,%0\;nor %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; add-logical fusion pattern generated by gen_logical_addsubf
+;; scalar subf -> nor
+(define_insn "*fuse_subf_nor"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (and:GPR (not:GPR (minus:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
+ (not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_ADDLOG)"
+ "@
+ subf %3,%1,%0\;nor %3,%3,%2
+ subf %3,%1,%0\;nor %3,%3,%2
+ subf %3,%1,%0\;nor %3,%3,%2
+ subf %4,%1,%0\;nor %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar and -> or
(define_insn "*fuse_and_or"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar andc -> or
(define_insn "*fuse_andc_or"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar eqv -> or
(define_insn "*fuse_eqv_or"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nand -> or
(define_insn "*fuse_nand_or"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nor -> or
(define_insn "*fuse_nor_or"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar or -> or
(define_insn "*fuse_or_or"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "%r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar orc -> or
(define_insn "*fuse_orc_or"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar xor -> or
(define_insn "*fuse_xor_or"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; add-logical fusion pattern generated by gen_logical_addsubf
+;; scalar add -> or
+(define_insn "*fuse_add_or"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (ior:GPR (plus:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_ADDLOG)"
+ "@
+ add %3,%1,%0\;or %3,%3,%2
+ add %3,%1,%0\;or %3,%3,%2
+ add %3,%1,%0\;or %3,%3,%2
+ add %4,%1,%0\;or %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; add-logical fusion pattern generated by gen_logical_addsubf
+;; scalar subf -> or
+(define_insn "*fuse_subf_or"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (ior:GPR (minus:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_ADDLOG)"
+ "@
+ subf %3,%1,%0\;or %3,%3,%2
+ subf %3,%1,%0\;or %3,%3,%2
+ subf %3,%1,%0\;or %3,%3,%2
+ subf %4,%1,%0\;or %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar and -> orc
(define_insn "*fuse_and_orc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar andc -> orc
(define_insn "*fuse_andc_orc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar eqv -> orc
(define_insn "*fuse_eqv_orc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nand -> orc
(define_insn "*fuse_nand_orc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nor -> orc
(define_insn "*fuse_nor_orc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar or -> orc
(define_insn "*fuse_or_orc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar orc -> orc
(define_insn "*fuse_orc_orc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (ior:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar xor -> orc
(define_insn "*fuse_xor_orc"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (ior:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r"))))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar and -> xor
(define_insn "*fuse_and_xor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (xor:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (xor:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar andc -> xor
(define_insn "*fuse_andc_xor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (xor:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (xor:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar eqv -> xor
(define_insn "*fuse_eqv_xor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (xor:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (xor:GPR (not:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nand -> xor
(define_insn "*fuse_nand_xor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (xor:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (xor:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar nor -> xor
(define_insn "*fuse_nor_xor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (xor:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (xor:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar or -> xor
(define_insn "*fuse_or_xor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (xor:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (xor:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar orc -> xor
(define_insn "*fuse_orc_xor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (xor:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (xor:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; scalar xor -> xor
(define_insn "*fuse_xor_xor"
[(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
- (xor:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (xor:GPR (xor:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
(match_operand:GPR 1 "gpc_reg_operand" "%r,r,r,r"))
(match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
(clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar and -> add
+(define_insn "*fuse_and_add"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (plus:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ and %3,%1,%0\;add %3,%3,%2
+ and %3,%1,%0\;add %3,%3,%2
+ and %3,%1,%0\;add %3,%3,%2
+ and %4,%1,%0\;add %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar nand -> add
+(define_insn "*fuse_nand_add"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (plus:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ nand %3,%1,%0\;add %3,%3,%2
+ nand %3,%1,%0\;add %3,%3,%2
+ nand %3,%1,%0\;add %3,%3,%2
+ nand %4,%1,%0\;add %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar nor -> add
+(define_insn "*fuse_nor_add"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (plus:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ nor %3,%1,%0\;add %3,%3,%2
+ nor %3,%1,%0\;add %3,%3,%2
+ nor %3,%1,%0\;add %3,%3,%2
+ nor %4,%1,%0\;add %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar or -> add
+(define_insn "*fuse_or_add"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (plus:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ or %3,%1,%0\;add %3,%3,%2
+ or %3,%1,%0\;add %3,%3,%2
+ or %3,%1,%0\;add %3,%3,%2
+ or %4,%1,%0\;add %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar and -> subf
+(define_insn "*fuse_and_subf"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (minus:GPR (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ and %3,%1,%0\;subf %3,%3,%2
+ and %3,%1,%0\;subf %3,%3,%2
+ and %3,%1,%0\;subf %3,%3,%2
+ and %4,%1,%0\;subf %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar nand -> subf
+(define_insn "*fuse_nand_subf"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (minus:GPR (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ nand %3,%1,%0\;subf %3,%3,%2
+ nand %3,%1,%0\;subf %3,%3,%2
+ nand %3,%1,%0\;subf %3,%3,%2
+ nand %4,%1,%0\;subf %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar nor -> subf
+(define_insn "*fuse_nor_subf"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (minus:GPR (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ nor %3,%1,%0\;subf %3,%3,%2
+ nor %3,%1,%0\;subf %3,%3,%2
+ nor %3,%1,%0\;subf %3,%3,%2
+ nor %4,%1,%0\;subf %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar or -> subf
+(define_insn "*fuse_or_subf"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (minus:GPR (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))
+ (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ or %3,%1,%0\;subf %3,%3,%2
+ or %3,%1,%0\;subf %3,%3,%2
+ or %3,%1,%0\;subf %3,%3,%2
+ or %4,%1,%0\;subf %3,%4,%2"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar and -> rsubf
+(define_insn "*fuse_and_rsubf"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (minus:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ and %3,%1,%0\;subf %3,%2,%3
+ and %3,%1,%0\;subf %3,%2,%3
+ and %3,%1,%0\;subf %3,%2,%3
+ and %4,%1,%0\;subf %3,%2,%4"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar nand -> rsubf
+(define_insn "*fuse_nand_rsubf"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (minus:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ nand %3,%1,%0\;subf %3,%2,%3
+ nand %3,%1,%0\;subf %3,%2,%3
+ nand %3,%1,%0\;subf %3,%2,%3
+ nand %4,%1,%0\;subf %3,%2,%4"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar nor -> rsubf
+(define_insn "*fuse_nor_rsubf"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (minus:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")
+ (and:GPR (not:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r"))
+ (not:GPR (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r")))))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ nor %3,%1,%0\;subf %3,%2,%3
+ nor %3,%1,%0\;subf %3,%2,%3
+ nor %3,%1,%0\;subf %3,%2,%3
+ nor %4,%1,%0\;subf %3,%2,%4"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-add fusion pattern generated by gen_logical_addsubf
+;; scalar or -> rsubf
+(define_insn "*fuse_or_rsubf"
+ [(set (match_operand:GPR 3 "gpc_reg_operand" "=0,1,&r,r")
+ (minus:GPR (match_operand:GPR 2 "gpc_reg_operand" "r,r,r,r")
+ (ior:GPR (match_operand:GPR 0 "gpc_reg_operand" "r,r,r,r")
+ (match_operand:GPR 1 "gpc_reg_operand" "r,r,r,r"))))
+ (clobber (match_scratch:GPR 4 "=X,X,X,&r"))]
+ "(TARGET_P10_FUSION && TARGET_P10_FUSION_LOGADD)"
+ "@
+ or %3,%1,%0\;subf %3,%2,%3
+ or %3,%1,%0\;subf %3,%2,%3
+ or %3,%1,%0\;subf %3,%2,%3
+ or %4,%1,%0\;subf %3,%2,%4"
+ [(set_attr "type" "fused_arith_logical")
+ (set_attr "cost" "6")
+ (set_attr "length" "8")])
+
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vand
(define_insn "*fuse_vand_vand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "%v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vand
(define_insn "*fuse_vandc_vand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vand
(define_insn "*fuse_veqv_vand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vand
(define_insn "*fuse_vnand_vand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vand
(define_insn "*fuse_vnor_vand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vand
(define_insn "*fuse_vor_vand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vand
(define_insn "*fuse_vorc_vand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vand
(define_insn "*fuse_vxor_vand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vandc
(define_insn "*fuse_vand_vandc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vandc
(define_insn "*fuse_vandc_vandc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vandc
(define_insn "*fuse_veqv_vandc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vandc
(define_insn "*fuse_vnand_vandc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vandc
(define_insn "*fuse_vnor_vandc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vandc
(define_insn "*fuse_vor_vandc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vandc
(define_insn "*fuse_vorc_vandc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vandc
(define_insn "*fuse_vxor_vandc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> veqv
(define_insn "*fuse_vand_veqv"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (not:VM (xor:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (not:VM (xor:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> veqv
(define_insn "*fuse_vandc_veqv"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (not:VM (xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (not:VM (xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> veqv
(define_insn "*fuse_veqv_veqv"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (not:VM (xor:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (not:VM (xor:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "%v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> veqv
(define_insn "*fuse_vnand_veqv"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (not:VM (xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (not:VM (xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> veqv
(define_insn "*fuse_vnor_veqv"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (not:VM (xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (not:VM (xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> veqv
(define_insn "*fuse_vor_veqv"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (not:VM (xor:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (not:VM (xor:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> veqv
(define_insn "*fuse_vorc_veqv"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (not:VM (xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (not:VM (xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> veqv
(define_insn "*fuse_vxor_veqv"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (not:VM (xor:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (not:VM (xor:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vnand
(define_insn "*fuse_vand_vnand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (not:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (not:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vnand
(define_insn "*fuse_vandc_vnand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vnand
(define_insn "*fuse_veqv_vnand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (not:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (not:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vnand
(define_insn "*fuse_vnand_vnand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vnand
(define_insn "*fuse_vnor_vnand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vnand
(define_insn "*fuse_vor_vnand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (not:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (not:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vnand
(define_insn "*fuse_vorc_vnand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vnand
(define_insn "*fuse_vxor_vnand"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vnor
(define_insn "*fuse_vand_vnor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (not:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (not:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vnor
(define_insn "*fuse_vandc_vnor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vnor
(define_insn "*fuse_veqv_vnor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (not:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (not:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vnor
(define_insn "*fuse_vnand_vnor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vnor
(define_insn "*fuse_vnor_vnor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (not:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vnor
(define_insn "*fuse_vor_vnor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (not:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (not:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vnor
(define_insn "*fuse_vorc_vnor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (and:VM (not:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vnor
(define_insn "*fuse_vxor_vnor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (and:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (and:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vor
(define_insn "*fuse_vand_vor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vor
(define_insn "*fuse_vandc_vor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vor
(define_insn "*fuse_veqv_vor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vor
(define_insn "*fuse_vnand_vor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vor
(define_insn "*fuse_vnor_vor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vor
(define_insn "*fuse_vor_vor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "%v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vor
(define_insn "*fuse_vorc_vor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vor
(define_insn "*fuse_vxor_vor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vorc
(define_insn "*fuse_vand_vorc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vorc
(define_insn "*fuse_vandc_vorc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vorc
(define_insn "*fuse_veqv_vorc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vorc
(define_insn "*fuse_vnand_vorc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vorc
(define_insn "*fuse_vnor_vorc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vorc
(define_insn "*fuse_vor_vorc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vorc
(define_insn "*fuse_vorc_vorc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (ior:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vorc
(define_insn "*fuse_vxor_vorc"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (ior:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (ior:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 2 "altivec_register_operand" "v,v,v,v"))))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vand -> vxor
(define_insn "*fuse_vand_vxor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (xor:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (xor:VM (and:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vandc -> vxor
(define_insn "*fuse_vandc_vxor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector veqv -> vxor
(define_insn "*fuse_veqv_vxor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (xor:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (xor:VM (not:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnand -> vxor
(define_insn "*fuse_vnand_vxor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vnor -> vxor
(define_insn "*fuse_vnor_vxor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (xor:VM (and:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(not:VM (match_operand:VM 1 "altivec_register_operand" "v,v,v,v")))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vor -> vxor
(define_insn "*fuse_vor_vxor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (xor:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (xor:VM (ior:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vorc -> vxor
(define_insn "*fuse_vorc_vxor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
+ (xor:VM (ior:VM (not:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 1 "altivec_register_operand" "v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]
(set_attr "cost" "6")
(set_attr "length" "8")])
-;; logical-logical fusion pattern generated by gen_2logical
+;; logical-logical fusion pattern generated by gen_logical_addsubf
;; vector vxor -> vxor
(define_insn "*fuse_vxor_vxor"
[(set (match_operand:VM 3 "altivec_register_operand" "=0,1,&v,v")
- (xor:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
+ (xor:VM (xor:VM (match_operand:VM 0 "altivec_register_operand" "v,v,v,v")
(match_operand:VM 1 "altivec_register_operand" "%v,v,v,v"))
(match_operand:VM 2 "altivec_register_operand" "v,v,v,v")))
(clobber (match_scratch:VM 4 "=X,X,X,&r"))]