nir: Handle divergence for decl_reg

Once decl_reg is handled, src[0].ssa->divergent will be properly set, so
load_reg and load_reg_indirect do not need special treatment.

shader-db can run to completion on HSW, IVB, and SNB now. No other
testing was done.

v2: Refactor nir_intrinsic_load_reg and nir_intrinsic_load_reg_indirect
handling. Suggested by Daniel Schürmann.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 4fd257d20fe ("nir: Properly handle divergence for load_reg")
Fixes: 6dbb5f1e07b ("intel/fs: rerun divergence analysis prior to convert_from_ssa")
Closes: #10233
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26436>
(cherry picked from commit 7fce0a5598fbfba73e10460b37865fe54b7c5bfc)

diff --git a/.pick_status.json b/.pick_status.json
index f3c6b23..1250e63 100644 (file)
--- a/.pick_status.json
+++ b/.pick_status.json
@@ -284,7 +284,7 @@
         "description": "nir: Handle divergence for decl_reg",
         "nominated": true,
         "nomination_type": 1,
-        "resolution": 0,
+        "resolution": 1,
         "main_sha": null,
         "because_sha": "4fd257d20fed9efdfedc4eefc99b4900841c6f85",
         "notes": null

diff --git a/src/compiler/nir/nir_divergence_analysis.c b/src/compiler/nir/nir_divergence_analysis.c
index ad34c4d..a37d0b8 100644 (file)
--- a/src/compiler/nir/nir_divergence_analysis.c
+++ b/src/compiler/nir/nir_divergence_analysis.c
@@ -219,14 +219,9 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
       is_divergent = false;
       break;
 
-   case nir_intrinsic_load_reg:
-   case nir_intrinsic_load_reg_indirect: {
-      nir_intrinsic_instr *decl = nir_reg_get_decl(instr->src[0].ssa);
-      is_divergent = nir_intrinsic_divergent(decl);
-      if (instr->intrinsic == nir_intrinsic_load_reg_indirect)
-         is_divergent |= instr->src[1].ssa->divergent;
+   case nir_intrinsic_decl_reg:
+      is_divergent = nir_intrinsic_divergent(instr);
       break;
-   }
 
    /* Intrinsics with divergence depending on shader stage and hardware */
    case nir_intrinsic_load_shader_record_ptr:
@@ -463,7 +458,9 @@ visit_intrinsic(nir_shader *shader, nir_intrinsic_instr *instr)
    case nir_intrinsic_load_desc_set_dynamic_index_intel:
    case nir_intrinsic_load_global_constant_bounded:
    case nir_intrinsic_load_global_constant_offset:
-   case nir_intrinsic_resource_intel: {
+   case nir_intrinsic_resource_intel:
+   case nir_intrinsic_load_reg:
+   case nir_intrinsic_load_reg_indirect: {
       unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
       for (unsigned i = 0; i < num_srcs; i++) {
          if (instr->src[i].ssa->divergent) {