* config/xtensa/xtensa.h (REG_CLASS_NAMES, REG_CLASS_CONTENTS):

        Add new RL_REGS register class.
        (PREFERRED_RELOAD_CLASS, PREFERRED_OUTPUT_RELOAD_CLASS):
        Call xtensa_preferred_reload_class for both input and output reloads.
        * config/xtensa/xtensa.c (xtensa_regno_to_class): Use new RL_REGS class.
        (xtensa_preferred_reload_class): Handle output reloads; use RL_REGS
        instead of either AR_REGS or GR_REGS classes.
        (xtensa_secondary_reload_class): Use new RL_REGS class.
        * config/xtensa/xtensa-protos.h (xtensa_preferred_reload_class): Update.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@57666 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3212d1b..6e3f57b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2002-09-30  Bob Wilson  <bob.wilson@acm.org>
+
+       * config/xtensa/xtensa.h (REG_CLASS_NAMES, REG_CLASS_CONTENTS):
+       Add new RL_REGS register class.
+       (PREFERRED_RELOAD_CLASS, PREFERRED_OUTPUT_RELOAD_CLASS):
+        Call xtensa_preferred_reload_class for both input and output reloads.
+       * config/xtensa/xtensa.c (xtensa_regno_to_class): Use new RL_REGS class.
+       (xtensa_preferred_reload_class): Handle output reloads; use RL_REGS
+       instead of either AR_REGS or GR_REGS classes.
+       (xtensa_secondary_reload_class): Use new RL_REGS class.
+       * config/xtensa/xtensa-protos.h (xtensa_preferred_reload_class): Update.
+
 2002-09-30  John David Anglin  <dave@hiauly1.hia.nrc.ca>
 
        * pa.c (hppa_encode_label): Don't drop '*' from function labels.

diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h
index ddeb5f3..051c81e 100644 (file)
--- a/gcc/config/xtensa/xtensa-protos.h
+++ b/gcc/config/xtensa/xtensa-protos.h
@@ -1,5 +1,5 @@
 /* Prototypes of target machine for GNU compiler for Xtensa.
-   Copyright (C) 2001 Free Software Foundation, Inc.
+   Copyright 2001,2002 Free Software Foundation, Inc.
    Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
 
 This file is part of GCC.
@@ -89,7 +89,7 @@ extern void xtensa_reorg PARAMS ((rtx));
 extern rtx xtensa_return_addr PARAMS ((int, rtx));
 extern rtx xtensa_builtin_saveregs PARAMS ((void));
 extern enum reg_class xtensa_preferred_reload_class
-  PARAMS ((rtx, enum reg_class));
+  PARAMS ((rtx, enum reg_class, int));
 extern enum reg_class xtensa_secondary_reload_class
   PARAMS ((enum reg_class, enum machine_mode, rtx, int));
 extern int a7_overlap_mentioned_p PARAMS ((rtx x));

diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 7b3ece1..ae7c994 100644 (file)
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -1,5 +1,5 @@
 /* Subroutines for insn-output.c for Tensilica's Xtensa architecture.
-   Copyright (C) 2001 Free Software Foundation, Inc.
+   Copyright 2001,2002 Free Software Foundation, Inc.
    Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
 
 This file is part of GCC.
@@ -107,10 +107,10 @@ const char xtensa_leaf_regs[FIRST_PSEUDO_REGISTER] =
 /* Map hard register number to register class */
 const enum reg_class xtensa_regno_to_class[FIRST_PSEUDO_REGISTER] =
 {
-  GR_REGS,     SP_REG,         GR_REGS,        GR_REGS,
-  GR_REGS,     GR_REGS,        GR_REGS,        GR_REGS,
-  GR_REGS,     GR_REGS,        GR_REGS,        GR_REGS,
-  GR_REGS,     GR_REGS,        GR_REGS,        GR_REGS,
+  RL_REGS,     SP_REG,         RL_REGS,        RL_REGS,
+  RL_REGS,     RL_REGS,        RL_REGS,        GR_REGS,
+  RL_REGS,     RL_REGS,        RL_REGS,        RL_REGS,
+  RL_REGS,     RL_REGS,        RL_REGS,        RL_REGS,
   AR_REGS,     AR_REGS,        BR_REGS,
   FP_REGS,     FP_REGS,        FP_REGS,        FP_REGS,
   FP_REGS,     FP_REGS,        FP_REGS,        FP_REGS,
@@ -2614,16 +2614,22 @@ xtensa_va_arg (valist, type)
 
 
 enum reg_class
-xtensa_preferred_reload_class (x, class)
+xtensa_preferred_reload_class (x, class, isoutput)
      rtx x;
      enum reg_class class;
+     int isoutput;
 {
-  if (CONSTANT_P (x) && GET_CODE (x) == CONST_DOUBLE)
+  if (!isoutput && CONSTANT_P (x) && GET_CODE (x) == CONST_DOUBLE)
     return NO_REGS;
 
-  /* Don't use sp for reloads! */
-  if (class == AR_REGS)
-    return GR_REGS;
+  /* Don't use the stack pointer or hard frame pointer for reloads!
+     The hard frame pointer would normally be OK except that it may
+     briefly hold an incoming argument in the prologue, and reload
+     won't know that it is live because the hard frame pointer is
+     treated specially.  */
+
+  if (class == AR_REGS || class == GR_REGS)
+    return RL_REGS;
 
   return class;
 }
@@ -2645,13 +2651,13 @@ xtensa_secondary_reload_class (class, mode, x, isoutput)
   if (!isoutput)
     {
       if (class == FP_REGS && constantpool_mem_p (x))
-       return GR_REGS;
+       return RL_REGS;
     }
 
   if (ACC_REG_P (regno))
-    return (class == GR_REGS ? NO_REGS : GR_REGS);
+    return ((class == GR_REGS || class == RL_REGS) ? NO_REGS : RL_REGS);
   if (class == ACC_REG)
-    return (GP_REG_P (regno) ? NO_REGS : GR_REGS);
+    return (GP_REG_P (regno) ? NO_REGS : RL_REGS);
 
   return NO_REGS;
 }

diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 84bb057..d1867a2 100644 (file)
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -1,5 +1,5 @@
 /* Definitions of Tensilica's Xtensa target machine for GNU compiler.
-   Copyright (C) 2001 Free Software Foundation, Inc.
+   Copyright 2001,2002 Free Software Foundation, Inc.
    Contributed by Bob Wilson (bwilson@tensilica.com) at Tensilica.
 
 This file is part of GCC.
@@ -554,6 +554,7 @@ enum reg_class
   FP_REGS,                     /* floating point registers */
   ACC_REG,                     /* MAC16 accumulator */
   SP_REG,                      /* sp register (aka a1) */
+  RL_REGS,                     /* preferred reload regs (not sp or fp) */
   GR_REGS,                     /* integer registers except sp */
   AR_REGS,                     /* all integer registers */
   ALL_REGS,                    /* all registers */
@@ -574,6 +575,7 @@ enum reg_class
   "FP_REGS",                                                           \
   "ACC_REG",                                                           \
   "SP_REG",                                                            \
+  "RL_REGS",                                                           \
   "GR_REGS",                                                           \
   "AR_REGS",                                                           \
   "ALL_REGS"                                                           \
@@ -589,6 +591,7 @@ enum reg_class
   { 0xfff80000, 0x00000007 }, /* floating-point registers */ \
   { 0x00000000, 0x00000008 }, /* MAC16 accumulator */ \
   { 0x00000002, 0x00000000 }, /* stack pointer register */ \
+  { 0x0000ff7d, 0x00000000 }, /* preferred reload registers */ \
   { 0x0000fffd, 0x00000000 }, /* general-purpose registers */ \
   { 0x0003ffff, 0x00000000 }, /* integer registers */ \
   { 0xffffffff, 0x0000000f }  /* all registers */ \
@@ -704,10 +707,10 @@ extern enum reg_class xtensa_char_to_class[256];
    : FALSE)
 
 #define PREFERRED_RELOAD_CLASS(X, CLASS)                               \
-  xtensa_preferred_reload_class (X, CLASS)
+  xtensa_preferred_reload_class (X, CLASS, 0)
 
 #define PREFERRED_OUTPUT_RELOAD_CLASS(X, CLASS)                                \
-  (CLASS)
+  xtensa_preferred_reload_class (X, CLASS, 1)
   
 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X)                   \
   xtensa_secondary_reload_class (CLASS, MODE, X, 0)