ARM: dts: renesas: Add R8A77980 V3H DTs and headers
authorMarek Vasut <marek.vasut+renesas@gmail.com>
Mon, 29 Jul 2019 17:59:44 +0000 (19:59 +0200)
committerMarek Vasut <marex@denx.de>
Fri, 9 Aug 2019 21:15:01 +0000 (23:15 +0200)
Import R8A77980 V3H DTs and headers from Linux 5.2.7 , commit 5697a9d3d55f.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
arch/arm/dts/r8a77980-u-boot.dtsi [new file with mode: 0644]
arch/arm/dts/r8a77980.dtsi [new file with mode: 0644]
include/dt-bindings/clock/r8a77980-cpg-mssr.h [new file with mode: 0644]
include/dt-bindings/power/r8a77980-sysc.h [new file with mode: 0644]

diff --git a/arch/arm/dts/r8a77980-u-boot.dtsi b/arch/arm/dts/r8a77980-u-boot.dtsi
new file mode 100644 (file)
index 0000000..1050f6e
--- /dev/null
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source extras for U-Boot on RCar R8A77980 SoC
+ *
+ * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
+ */
+
+#include "r8a779x-u-boot.dtsi"
+
+&extalr_clk {
+       u-boot,dm-pre-reloc;
+};
+
+/ {
+       soc {
+               rpc: rpc@0xee200000 {
+                       compatible = "renesas,rpc-r8a77980", "renesas,rpc";
+                       reg = <0 0xee200000 0 0x100>, <0 0x08000000 0 0>;
+                       clocks = <&cpg CPG_MOD 917>;
+                       bank-width = <2>;
+                       status = "disabled";
+               };
+       };
+};
diff --git a/arch/arm/dts/r8a77980.dtsi b/arch/arm/dts/r8a77980.dtsi
new file mode 100644 (file)
index 0000000..a901a34
--- /dev/null
@@ -0,0 +1,1605 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the R-Car V3H (R8A77980) SoC
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ */
+
+#include <dt-bindings/clock/r8a77980-cpg-mssr.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/power/r8a77980-sysc.h>
+
+/ {
+       compatible = "renesas,r8a77980";
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
+               i2c5 = &i2c5;
+       };
+
+       /* External CAN clock - to be overridden by boards that provide it */
+       can_clk: can {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               a53_0: cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53";
+                       reg = <0>;
+                       clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+                       power-domains = <&sysc R8A77980_PD_CA53_CPU0>;
+                       next-level-cache = <&L2_CA53>;
+                       enable-method = "psci";
+               };
+
+               a53_1: cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53";
+                       reg = <1>;
+                       clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+                       power-domains = <&sysc R8A77980_PD_CA53_CPU1>;
+                       next-level-cache = <&L2_CA53>;
+                       enable-method = "psci";
+               };
+
+               a53_2: cpu@2 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53";
+                       reg = <2>;
+                       clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+                       power-domains = <&sysc R8A77980_PD_CA53_CPU2>;
+                       next-level-cache = <&L2_CA53>;
+                       enable-method = "psci";
+               };
+
+               a53_3: cpu@3 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a53";
+                       reg = <3>;
+                       clocks = <&cpg CPG_CORE R8A77980_CLK_Z2>;
+                       power-domains = <&sysc R8A77980_PD_CA53_CPU3>;
+                       next-level-cache = <&L2_CA53>;
+                       enable-method = "psci";
+               };
+
+               L2_CA53: cache-controller {
+                       compatible = "cache";
+                       power-domains = <&sysc R8A77980_PD_CA53_SCU>;
+                       cache-unified;
+                       cache-level = <2>;
+               };
+       };
+
+       extal_clk: extal {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               /* This value must be overridden by the board */
+               clock-frequency = <0>;
+       };
+
+       extalr_clk: extalr {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               /* This value must be overridden by the board */
+               clock-frequency = <0>;
+       };
+
+       /* External PCIe clock - can be overridden by the board */
+       pcie_bus_clk: pcie_bus {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       pmu_a53 {
+               compatible = "arm,cortex-a53-pmu";
+               interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
+       };
+
+       psci {
+               compatible = "arm,psci-1.0", "arm,psci-0.2";
+               method = "smc";
+       };
+
+       /* External SCIF clock - to be overridden by boards that provide it */
+       scif_clk: scif {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <0>;
+       };
+
+       soc {
+               compatible = "simple-bus";
+               interrupt-parent = <&gic>;
+
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               rwdt: watchdog@e6020000 {
+                       compatible = "renesas,r8a77980-wdt",
+                                    "renesas,rcar-gen3-wdt";
+                       reg = <0 0xe6020000 0 0x0c>;
+                       clocks = <&cpg CPG_MOD 402>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 402>;
+                       status = "disabled";
+               };
+
+               gpio0: gpio@e6050000 {
+                       compatible = "renesas,gpio-r8a77980",
+                                    "renesas,rcar-gen3-gpio";
+                       reg = <0 0xe6050000 0 0x50>;
+                       interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+                       #gpio-cells = <2>;
+                       gpio-controller;
+                       gpio-ranges = <&pfc 0 0 22>;
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+                       clocks = <&cpg CPG_MOD 912>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 912>;
+               };
+
+               gpio1: gpio@e6051000 {
+                       compatible = "renesas,gpio-r8a77980",
+                                    "renesas,rcar-gen3-gpio";
+                       reg = <0 0xe6051000 0 0x50>;
+                       interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
+                       #gpio-cells = <2>;
+                       gpio-controller;
+                       gpio-ranges = <&pfc 0 32 28>;
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+                       clocks = <&cpg CPG_MOD 911>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 911>;
+               };
+
+               gpio2: gpio@e6052000 {
+                       compatible = "renesas,gpio-r8a77980",
+                                    "renesas,rcar-gen3-gpio";
+                       reg = <0 0xe6052000 0 0x50>;
+                       interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
+                       #gpio-cells = <2>;
+                       gpio-controller;
+                       gpio-ranges = <&pfc 0 64 30>;
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+                       clocks = <&cpg CPG_MOD 910>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 910>;
+               };
+
+               gpio3: gpio@e6053000 {
+                       compatible = "renesas,gpio-r8a77980",
+                                    "renesas,rcar-gen3-gpio";
+                       reg = <0 0xe6053000 0 0x50>;
+                       interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+                       #gpio-cells = <2>;
+                       gpio-controller;
+                       gpio-ranges = <&pfc 0 96 17>;
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+                       clocks = <&cpg CPG_MOD 909>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 909>;
+               };
+
+               gpio4: gpio@e6054000 {
+                       compatible = "renesas,gpio-r8a77980",
+                                    "renesas,rcar-gen3-gpio";
+                       reg = <0 0xe6054000 0 0x50>;
+                       interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+                       #gpio-cells = <2>;
+                       gpio-controller;
+                       gpio-ranges = <&pfc 0 128 25>;
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+                       clocks = <&cpg CPG_MOD 908>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 908>;
+               };
+
+               gpio5: gpio@e6055000 {
+                       compatible = "renesas,gpio-r8a77980",
+                                    "renesas,rcar-gen3-gpio";
+                       reg = <0 0xe6055000 0 0x50>;
+                       interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
+                       #gpio-cells = <2>;
+                       gpio-controller;
+                       gpio-ranges = <&pfc 0 160 15>;
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+                       clocks = <&cpg CPG_MOD 907>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 907>;
+               };
+
+               pfc: pin-controller@e6060000 {
+                       compatible = "renesas,pfc-r8a77980";
+                       reg = <0 0xe6060000 0 0x50c>;
+               };
+
+               cmt0: timer@e60f0000 {
+                       compatible = "renesas,r8a77980-cmt0",
+                                    "renesas,rcar-gen3-cmt0";
+                       reg = <0 0xe60f0000 0 0x1004>;
+                       interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 303>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 303>;
+                       status = "disabled";
+               };
+
+               cmt1: timer@e6130000 {
+                       compatible = "renesas,r8a77980-cmt1",
+                                    "renesas,rcar-gen3-cmt1";
+                       reg = <0 0xe6130000 0 0x1004>;
+                       interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 302>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 302>;
+                       status = "disabled";
+               };
+
+               cmt2: timer@e6140000 {
+                       compatible = "renesas,r8a77980-cmt1",
+                                    "renesas,rcar-gen3-cmt1";
+                       reg = <0 0xe6140000 0 0x1004>;
+                       interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 301>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 301>;
+                       status = "disabled";
+               };
+
+               cmt3: timer@e6148000 {
+                       compatible = "renesas,r8a77980-cmt1",
+                                    "renesas,rcar-gen3-cmt1";
+                       reg = <0 0xe6148000 0 0x1004>;
+                       interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 276 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 277 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 300>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 300>;
+                       status = "disabled";
+               };
+
+               cpg: clock-controller@e6150000 {
+                       compatible = "renesas,r8a77980-cpg-mssr";
+                       reg = <0 0xe6150000 0 0x1000>;
+                       clocks = <&extal_clk>, <&extalr_clk>;
+                       clock-names = "extal", "extalr";
+                       #clock-cells = <2>;
+                       #power-domain-cells = <0>;
+                       #reset-cells = <1>;
+               };
+
+               rst: reset-controller@e6160000 {
+                       compatible = "renesas,r8a77980-rst";
+                       reg = <0 0xe6160000 0 0x200>;
+               };
+
+               sysc: system-controller@e6180000 {
+                       compatible = "renesas,r8a77980-sysc";
+                       reg = <0 0xe6180000 0 0x440>;
+                       #power-domain-cells = <1>;
+               };
+
+               tsc: thermal@e6198000 {
+                       compatible = "renesas,r8a77980-thermal";
+                       reg = <0 0xe6198000 0 0x100>,
+                             <0 0xe61a0000 0 0x100>;
+                       interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 522>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 522>;
+                       #thermal-sensor-cells = <1>;
+               };
+
+               intc_ex: interrupt-controller@e61c0000 {
+                       compatible = "renesas,intc-ex-r8a77980", "renesas,irqc";
+                       #interrupt-cells = <2>;
+                       interrupt-controller;
+                       reg = <0 0xe61c0000 0 0x200>;
+                       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 407>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 407>;
+               };
+
+               tmu0: timer@e61e0000 {
+                       compatible = "renesas,tmu-r8a77980", "renesas,tmu";
+                       reg = <0 0xe61e0000 0 0x30>;
+                       interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 125>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 125>;
+                       status = "disabled";
+               };
+
+               tmu1: timer@e6fc0000 {
+                       compatible = "renesas,tmu-r8a77980", "renesas,tmu";
+                       reg = <0 0xe6fc0000 0 0x30>;
+                       interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 124>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 124>;
+                       status = "disabled";
+               };
+
+               tmu2: timer@e6fd0000 {
+                       compatible = "renesas,tmu-r8a77980", "renesas,tmu";
+                       reg = <0 0xe6fd0000 0 0x30>;
+                       interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 123>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 123>;
+                       status = "disabled";
+               };
+
+               tmu3: timer@e6fe0000 {
+                       compatible = "renesas,tmu-r8a77980", "renesas,tmu";
+                       reg = <0 0xe6fe0000 0 0x30>;
+                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 122>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 122>;
+                       status = "disabled";
+               };
+
+               tmu4: timer@ffc00000 {
+                       compatible = "renesas,tmu-r8a77980", "renesas,tmu";
+                       reg = <0 0xffc00000 0 0x30>;
+                       interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 121>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 121>;
+                       status = "disabled";
+               };
+
+               i2c0: i2c@e6500000 {
+                       compatible = "renesas,i2c-r8a77980",
+                                    "renesas,rcar-gen3-i2c";
+                       reg = <0 0xe6500000 0 0x40>;
+                       interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 931>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 931>;
+                       dmas = <&dmac1 0x91>, <&dmac1 0x90>,
+                              <&dmac2 0x91>, <&dmac2 0x90>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       i2c-scl-internal-delay-ns = <6>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               i2c1: i2c@e6508000 {
+                       compatible = "renesas,i2c-r8a77980",
+                                    "renesas,rcar-gen3-i2c";
+                       reg = <0 0xe6508000 0 0x40>;
+                       interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 930>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 930>;
+                       dmas = <&dmac1 0x93>, <&dmac1 0x92>,
+                              <&dmac2 0x93>, <&dmac2 0x92>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       i2c-scl-internal-delay-ns = <6>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               i2c2: i2c@e6510000 {
+                       compatible = "renesas,i2c-r8a77980",
+                                    "renesas,rcar-gen3-i2c";
+                       reg = <0 0xe6510000 0 0x40>;
+                       interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 929>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 929>;
+                       dmas = <&dmac1 0x95>, <&dmac1 0x94>,
+                              <&dmac2 0x95>, <&dmac2 0x94>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       i2c-scl-internal-delay-ns = <6>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               i2c3: i2c@e66d0000 {
+                       compatible = "renesas,i2c-r8a77980",
+                                    "renesas,rcar-gen3-i2c";
+                       reg = <0 0xe66d0000 0 0x40>;
+                       interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 928>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 928>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               i2c4: i2c@e66d8000 {
+                       compatible = "renesas,i2c-r8a77980",
+                                    "renesas,rcar-gen3-i2c";
+                       reg = <0 0xe66d8000 0 0x40>;
+                       interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 927>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 927>;
+                       i2c-scl-internal-delay-ns = <6>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               i2c5: i2c@e66e0000 {
+                       compatible = "renesas,i2c-r8a77980",
+                                    "renesas,rcar-gen3-i2c";
+                       reg = <0 0xe66e0000 0 0x40>;
+                       interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 919>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 919>;
+                       dmas = <&dmac1 0x9b>, <&dmac1 0x9a>,
+                              <&dmac2 0x9b>, <&dmac2 0x9a>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       i2c-scl-internal-delay-ns = <6>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               hscif0: serial@e6540000 {
+                       compatible = "renesas,hscif-r8a77980",
+                                    "renesas,rcar-gen3-hscif",
+                                    "renesas,hscif";
+                       reg = <0 0xe6540000 0 0x60>;
+                       interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 520>,
+                                <&cpg CPG_CORE R8A77980_CLK_S3D1>,
+                                <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       dmas = <&dmac1 0x31>, <&dmac1 0x30>,
+                              <&dmac2 0x31>, <&dmac2 0x30>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 520>;
+                       status = "disabled";
+               };
+
+               hscif1: serial@e6550000 {
+                       compatible = "renesas,hscif-r8a77980",
+                                    "renesas,rcar-gen3-hscif",
+                                    "renesas,hscif";
+                       reg = <0 0xe6550000 0 0x60>;
+                       interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 519>,
+                                <&cpg CPG_CORE R8A77980_CLK_S3D1>,
+                                <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       dmas = <&dmac1 0x33>, <&dmac1 0x32>,
+                              <&dmac2 0x33>, <&dmac2 0x32>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 519>;
+                       status = "disabled";
+               };
+
+               hscif2: serial@e6560000 {
+                       compatible = "renesas,hscif-r8a77980",
+                                    "renesas,rcar-gen3-hscif",
+                                    "renesas,hscif";
+                       reg = <0 0xe6560000 0 0x60>;
+                       interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 518>,
+                                <&cpg CPG_CORE R8A77980_CLK_S3D1>,
+                                <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       dmas = <&dmac1 0x35>, <&dmac1 0x34>,
+                              <&dmac2 0x35>, <&dmac2 0x34>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 518>;
+                       status = "disabled";
+               };
+
+               hscif3: serial@e66a0000 {
+                       compatible = "renesas,hscif-r8a77980",
+                                    "renesas,rcar-gen3-hscif",
+                                    "renesas,hscif";
+                       reg = <0 0xe66a0000 0 0x60>;
+                       interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 517>,
+                                <&cpg CPG_CORE R8A77980_CLK_S3D1>,
+                                <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       dmas = <&dmac1 0x37>, <&dmac1 0x36>,
+                              <&dmac2 0x37>, <&dmac2 0x36>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 517>;
+                       status = "disabled";
+               };
+
+               pcie_phy: pcie-phy@e65d0000 {
+                       compatible = "renesas,r8a77980-pcie-phy";
+                       reg = <0 0xe65d0000 0 0x8000>;
+                       #phy-cells = <0>;
+                       clocks = <&cpg CPG_MOD 319>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 319>;
+                       status = "disabled";
+               };
+
+               canfd: can@e66c0000 {
+                       compatible = "renesas,r8a77980-canfd",
+                                    "renesas,rcar-gen3-canfd";
+                       reg = <0 0xe66c0000 0 0x8000>;
+                       interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 914>,
+                                <&cpg CPG_CORE R8A77980_CLK_CANFD>,
+                                <&can_clk>;
+                       clock-names = "fck", "canfd", "can_clk";
+                       assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>;
+                       assigned-clock-rates = <40000000>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 914>;
+                       status = "disabled";
+
+                       channel0 {
+                               status = "disabled";
+                       };
+
+                       channel1 {
+                               status = "disabled";
+                       };
+               };
+
+               avb: ethernet@e6800000 {
+                       compatible = "renesas,etheravb-r8a77980",
+                                    "renesas,etheravb-rcar-gen3";
+                       reg = <0 0xe6800000 0 0x800>;
+                       interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "ch0", "ch1", "ch2", "ch3",
+                                         "ch4", "ch5", "ch6", "ch7",
+                                         "ch8", "ch9", "ch10", "ch11",
+                                         "ch12", "ch13", "ch14", "ch15",
+                                         "ch16", "ch17", "ch18", "ch19",
+                                         "ch20", "ch21", "ch22", "ch23",
+                                         "ch24";
+                       clocks = <&cpg CPG_MOD 812>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 812>;
+                       phy-mode = "rgmii";
+                       iommus = <&ipmmu_ds1 33>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               pwm0: pwm@e6e30000 {
+                       compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
+                       reg = <0 0xe6e30000 0 0x10>;
+                       #pwm-cells = <2>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       status = "disabled";
+               };
+
+               pwm1: pwm@e6e31000 {
+                       compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
+                       reg = <0 0xe6e31000 0 0x10>;
+                       #pwm-cells = <2>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       status = "disabled";
+               };
+
+               pwm2: pwm@e6e32000 {
+                       compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
+                       reg = <0 0xe6e32000 0 0x10>;
+                       #pwm-cells = <2>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       status = "disabled";
+               };
+
+               pwm3: pwm@e6e33000 {
+                       compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
+                       reg = <0 0xe6e33000 0 0x10>;
+                       #pwm-cells = <2>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       status = "disabled";
+               };
+
+               pwm4: pwm@e6e34000 {
+                       compatible = "renesas,pwm-r8a77980", "renesas,pwm-rcar";
+                       reg = <0 0xe6e34000 0 0x10>;
+                       #pwm-cells = <2>;
+                       clocks = <&cpg CPG_MOD 523>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 523>;
+                       status = "disabled";
+               };
+
+               scif0: serial@e6e60000 {
+                       compatible = "renesas,scif-r8a77980",
+                                    "renesas,rcar-gen3-scif",
+                                    "renesas,scif";
+                       reg = <0 0xe6e60000 0 0x40>;
+                       interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 207>,
+                                <&cpg CPG_CORE R8A77980_CLK_S3D1>,
+                                <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       dmas = <&dmac1 0x51>, <&dmac1 0x50>,
+                              <&dmac2 0x51>, <&dmac2 0x50>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 207>;
+                       status = "disabled";
+               };
+
+               scif1: serial@e6e68000 {
+                       compatible = "renesas,scif-r8a77980",
+                                    "renesas,rcar-gen3-scif",
+                                    "renesas,scif";
+                       reg = <0 0xe6e68000 0 0x40>;
+                       interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 206>,
+                                <&cpg CPG_CORE R8A77980_CLK_S3D1>,
+                                <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       dmas = <&dmac1 0x53>, <&dmac1 0x52>,
+                              <&dmac2 0x53>, <&dmac2 0x52>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 206>;
+                       status = "disabled";
+               };
+
+               scif3: serial@e6c50000 {
+                       compatible = "renesas,scif-r8a77980",
+                                    "renesas,rcar-gen3-scif",
+                                    "renesas,scif";
+                       reg = <0 0xe6c50000 0 0x40>;
+                       interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 204>,
+                                <&cpg CPG_CORE R8A77980_CLK_S3D1>,
+                                <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       dmas = <&dmac1 0x57>, <&dmac1 0x56>,
+                              <&dmac2 0x57>, <&dmac2 0x56>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 204>;
+                       status = "disabled";
+               };
+
+               scif4: serial@e6c40000 {
+                       compatible = "renesas,scif-r8a77980",
+                                    "renesas,rcar-gen3-scif",
+                                    "renesas,scif";
+                       reg = <0 0xe6c40000 0 0x40>;
+                       interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 203>,
+                                <&cpg CPG_CORE R8A77980_CLK_S3D1>,
+                                <&scif_clk>;
+                       clock-names = "fck", "brg_int", "scif_clk";
+                       dmas = <&dmac1 0x59>, <&dmac1 0x58>,
+                              <&dmac2 0x59>, <&dmac2 0x58>;
+                       dma-names = "tx", "rx", "tx", "rx";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 203>;
+                       status = "disabled";
+               };
+
+               tpu: pwm@e6e80000 {
+                       compatible = "renesas,tpu-r8a77980", "renesas,tpu";
+                       reg = <0 0xe6e80000 0 0x148>;
+                       interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 304>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 304>;
+                       #pwm-cells = <3>;
+                       status = "disabled";
+               };
+
+               msiof0: spi@e6e90000 {
+                       compatible = "renesas,msiof-r8a77980",
+                                    "renesas,rcar-gen3-msiof";
+                       reg = <0 0xe6e90000 0 0x64>;
+                       interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 211>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 211>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               msiof1: spi@e6ea0000 {
+                       compatible = "renesas,msiof-r8a77980",
+                                    "renesas,rcar-gen3-msiof";
+                       reg = <0 0xe6ea0000 0 0x0064>;
+                       interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 210>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 210>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               msiof2: spi@e6c00000 {
+                       compatible = "renesas,msiof-r8a77980",
+                                    "renesas,rcar-gen3-msiof";
+                       reg = <0 0xe6c00000 0 0x0064>;
+                       interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 209>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 209>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               msiof3: spi@e6c10000 {
+                       compatible = "renesas,msiof-r8a77980",
+                                    "renesas,rcar-gen3-msiof";
+                       reg = <0 0xe6c10000 0 0x0064>;
+                       interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 208>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 208>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               vin0: video@e6ef0000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6ef0000 0 0x1000>;
+                       interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 811>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 811>;
+                       renesas,id = <0>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <1>;
+
+                                       vin0csi40: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&csi40vin0>;
+                                       };
+                               };
+                       };
+               };
+
+               vin1: video@e6ef1000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6ef1000 0 0x1000>;
+                       interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 810>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       status = "disabled";
+                       renesas,id = <1>;
+                       resets = <&cpg 810>;
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <1>;
+
+                                       vin1csi40: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&csi40vin1>;
+                                       };
+                               };
+                       };
+               };
+
+               vin2: video@e6ef2000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6ef2000 0 0x1000>;
+                       interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 809>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 809>;
+                       renesas,id = <2>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <1>;
+
+                                       vin2csi40: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&csi40vin2>;
+                                       };
+                               };
+                       };
+               };
+
+               vin3: video@e6ef3000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6ef3000 0 0x1000>;
+                       interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 808>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 808>;
+                       renesas,id = <3>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <1>;
+
+                                       vin3csi40: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&csi40vin3>;
+                                       };
+                               };
+                       };
+               };
+
+               vin4: video@e6ef4000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6ef4000 0 0x1000>;
+                       interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 807>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 807>;
+                       renesas,id = <4>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <1>;
+
+                                       vin4csi41: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&csi41vin4>;
+                                       };
+                               };
+                       };
+               };
+
+               vin5: video@e6ef5000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6ef5000 0 0x1000>;
+                       interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 806>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 806>;
+                       renesas,id = <5>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <1>;
+
+                                       vin5csi41: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&csi41vin5>;
+                                       };
+                               };
+                       };
+               };
+
+               vin6: video@e6ef6000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6ef6000 0 0x1000>;
+                       interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 805>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 805>;
+                       renesas,id = <6>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <1>;
+
+                                       vin6csi41: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&csi41vin6>;
+                                       };
+                               };
+                       };
+               };
+
+               vin7: video@e6ef7000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6ef7000 0 0x1000>;
+                       interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 804>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 804>;
+                       renesas,id = <7>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <1>;
+
+                                       vin7csi41: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&csi41vin7>;
+                                       };
+                               };
+                       };
+               };
+
+               vin8: video@e6ef8000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6ef8000 0 0x1000>;
+                       interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 628>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 628>;
+                       renesas,id = <8>;
+                       status = "disabled";
+               };
+
+               vin9: video@e6ef9000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6ef9000 0 0x1000>;
+                       interrupts = <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 627>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 627>;
+                       renesas,id = <9>;
+                       status = "disabled";
+               };
+
+               vin10: video@e6efa000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6efa000 0 0x1000>;
+                       interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 625>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 625>;
+                       renesas,id = <10>;
+                       status = "disabled";
+               };
+
+               vin11: video@e6efb000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6efb000 0 0x1000>;
+                       interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 618>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 618>;
+                       renesas,id = <11>;
+                       status = "disabled";
+               };
+
+               vin12: video@e6efc000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6efc000 0 0x1000>;
+                       interrupts = <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 612>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 612>;
+                       renesas,id = <12>;
+                       status = "disabled";
+               };
+
+               vin13: video@e6efd000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6efd000 0 0x1000>;
+                       interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 608>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 608>;
+                       renesas,id = <13>;
+                       status = "disabled";
+               };
+
+               vin14: video@e6efe000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6efe000 0 0x1000>;
+                       interrupts = <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 605>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 605>;
+                       renesas,id = <14>;
+                       status = "disabled";
+               };
+
+               vin15: video@e6eff000 {
+                       compatible = "renesas,vin-r8a77980";
+                       reg = <0 0xe6eff000 0 0x1000>;
+                       interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 604>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 604>;
+                       renesas,id = <15>;
+                       status = "disabled";
+               };
+
+               dmac1: dma-controller@e7300000 {
+                       compatible = "renesas,dmac-r8a77980",
+                                    "renesas,rcar-dmac";
+                       reg = <0 0xe7300000 0 0x10000>;
+                       interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "error",
+                                         "ch0", "ch1", "ch2", "ch3",
+                                         "ch4", "ch5", "ch6", "ch7",
+                                         "ch8", "ch9", "ch10", "ch11",
+                                         "ch12", "ch13", "ch14", "ch15";
+                       clocks = <&cpg CPG_MOD 218>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 218>;
+                       #dma-cells = <1>;
+                       dma-channels = <16>;
+                       iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>,
+                              <&ipmmu_ds1 2>, <&ipmmu_ds1 3>,
+                              <&ipmmu_ds1 4>, <&ipmmu_ds1 5>,
+                              <&ipmmu_ds1 6>, <&ipmmu_ds1 7>,
+                              <&ipmmu_ds1 8>, <&ipmmu_ds1 9>,
+                              <&ipmmu_ds1 10>, <&ipmmu_ds1 11>,
+                              <&ipmmu_ds1 12>, <&ipmmu_ds1 13>,
+                              <&ipmmu_ds1 14>, <&ipmmu_ds1 15>;
+               };
+
+               dmac2: dma-controller@e7310000 {
+                       compatible = "renesas,dmac-r8a77980",
+                                    "renesas,rcar-dmac";
+                       reg = <0 0xe7310000 0 0x10000>;
+                       interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 362 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 363 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 364 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 366 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 367 IRQ_TYPE_LEVEL_HIGH
+                                     GIC_SPI 368 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "error",
+                                         "ch0", "ch1", "ch2", "ch3",
+                                         "ch4", "ch5", "ch6", "ch7",
+                                         "ch8", "ch9", "ch10", "ch11",
+                                         "ch12", "ch13", "ch14", "ch15";
+                       clocks = <&cpg CPG_MOD 217>;
+                       clock-names = "fck";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 217>;
+                       #dma-cells = <1>;
+                       dma-channels = <16>;
+                       iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>,
+                              <&ipmmu_ds1 18>, <&ipmmu_ds1 19>,
+                              <&ipmmu_ds1 20>, <&ipmmu_ds1 21>,
+                              <&ipmmu_ds1 22>, <&ipmmu_ds1 23>,
+                              <&ipmmu_ds1 24>, <&ipmmu_ds1 25>,
+                              <&ipmmu_ds1 26>, <&ipmmu_ds1 27>,
+                              <&ipmmu_ds1 28>, <&ipmmu_ds1 29>,
+                              <&ipmmu_ds1 30>, <&ipmmu_ds1 31>;
+               };
+
+               gether: ethernet@e7400000 {
+                       compatible = "renesas,gether-r8a77980";
+                       reg = <0 0xe7400000 0 0x1000>;
+                       interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 813>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 813>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
+               ipmmu_ds1: mmu@e7740000 {
+                       compatible = "renesas,ipmmu-r8a77980";
+                       reg = <0 0xe7740000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 0>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_ir: mmu@ff8b0000 {
+                       compatible = "renesas,ipmmu-r8a77980";
+                       reg = <0 0xff8b0000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 3>;
+                       power-domains = <&sysc R8A77980_PD_A3IR>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_mm: mmu@e67b0000 {
+                       compatible = "renesas,ipmmu-r8a77980";
+                       reg = <0 0xe67b0000 0 0x1000>;
+                       interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_rt: mmu@ffc80000 {
+                       compatible = "renesas,ipmmu-r8a77980";
+                       reg = <0 0xffc80000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 10>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_vc0: mmu@fe6b0000 {
+                       compatible = "renesas,ipmmu-r8a77980";
+                       reg = <0 0xfe6b0000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 12>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_vi0: mmu@febd0000 {
+                       compatible = "renesas,ipmmu-r8a77980";
+                       reg = <0 0xfebd0000 0 0x1000>;
+                       renesas,ipmmu-main = <&ipmmu_mm 14>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_vip0: mmu@e7b00000 {
+                       compatible = "renesas,ipmmu-r8a77980";
+                       reg = <0 0xe7b00000 0 0x1000>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               ipmmu_vip1: mmu@e7960000 {
+                       compatible = "renesas,ipmmu-r8a77980";
+                       reg = <0 0xe7960000 0 0x1000>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       #iommu-cells = <1>;
+               };
+
+               mmc0: mmc@ee140000 {
+                       compatible = "renesas,sdhi-r8a77980",
+                                    "renesas,rcar-gen3-sdhi";
+                       reg = <0 0xee140000 0 0x2000>;
+                       interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 314>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 314>;
+                       max-frequency = <200000000>;
+                       status = "disabled";
+               };
+
+               gic: interrupt-controller@f1010000 {
+                       compatible = "arm,gic-400";
+                       #interrupt-cells = <3>;
+                       #address-cells = <0>;
+                       interrupt-controller;
+                       reg = <0x0 0xf1010000 0 0x1000>,
+                             <0x0 0xf1020000 0 0x20000>,
+                             <0x0 0xf1040000 0 0x20000>,
+                             <0x0 0xf1060000 0 0x20000>;
+                       interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+                                     IRQ_TYPE_LEVEL_HIGH)>;
+                       clocks = <&cpg CPG_MOD 408>;
+                       clock-names = "clk";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 408>;
+               };
+
+               pciec: pcie@fe000000 {
+                       compatible = "renesas,pcie-r8a77980",
+                                    "renesas,pcie-rcar-gen3";
+                       reg = <0 0xfe000000 0 0x80000>;
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+                       bus-range = <0x00 0xff>;
+                       device_type = "pci";
+                       ranges = <
+                               0x01000000 0 0x00000000 0 0xfe100000 0 0x0100000
+                               0x02000000 0 0xfe200000 0 0xfe200000 0 0x0200000
+                               0x02000000 0 0x30000000 0 0x30000000 0 0x8000000
+                               0x42000000 0 0x38000000 0 0x38000000 0 0x8000000
+                       >;
+                       dma-ranges = <0x42000000 0 0x40000000 0 0x40000000
+                                     0 0x80000000>;
+                       interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
+                       #interrupt-cells = <1>;
+                       interrupt-map-mask = <0 0 0 0>;
+                       interrupt-map = <0 0 0 0 &gic GIC_SPI 148
+                                        IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
+                       clock-names = "pcie", "pcie_bus";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 319>;
+                       phys = <&pcie_phy>;
+                       phy-names = "pcie";
+                       status = "disabled";
+               };
+
+               vspd0: vsp@fea20000 {
+                       compatible = "renesas,vsp2";
+                       reg = <0 0xfea20000 0 0x5000>;
+                       interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 623>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 623>;
+                       renesas,fcp = <&fcpvd0>;
+               };
+
+               fcpvd0: fcp@fea27000 {
+                       compatible = "renesas,fcpv";
+                       reg = <0 0xfea27000 0 0x200>;
+                       clocks = <&cpg CPG_MOD 603>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 603>;
+               };
+
+               csi40: csi2@feaa0000 {
+                       compatible = "renesas,r8a77980-csi2";
+                       reg = <0 0xfeaa0000 0 0x10000>;
+                       interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 716>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 716>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <1>;
+
+                                       csi40vin0: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&vin0csi40>;
+                                       };
+                                       csi40vin1: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&vin1csi40>;
+                                       };
+                                       csi40vin2: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&vin2csi40>;
+                                       };
+                                       csi40vin3: endpoint@3 {
+                                               reg = <3>;
+                                               remote-endpoint = <&vin3csi40>;
+                                       };
+                               };
+                       };
+               };
+
+               csi41: csi2@feab0000 {
+                       compatible = "renesas,r8a77980-csi2";
+                       reg = <0 0xfeab0000 0 0x10000>;
+                       interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 715>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 715>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <1>;
+
+                                       csi41vin4: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&vin4csi41>;
+                                       };
+                                       csi41vin5: endpoint@1 {
+                                               reg = <1>;
+                                               remote-endpoint = <&vin5csi41>;
+                                       };
+                                       csi41vin6: endpoint@2 {
+                                               reg = <2>;
+                                               remote-endpoint = <&vin6csi41>;
+                                       };
+                                       csi41vin7: endpoint@3 {
+                                               reg = <3>;
+                                               remote-endpoint = <&vin7csi41>;
+                                       };
+                               };
+                       };
+               };
+
+               du: display@feb00000 {
+                       compatible = "renesas,du-r8a77980",
+                                    "renesas,du-r8a77970";
+                       reg = <0 0xfeb00000 0 0x80000>;
+                       interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 724>;
+                       clock-names = "du.0";
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 724>;
+                       vsps = <&vspd0>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                                       du_out_rgb: endpoint {
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       du_out_lvds0: endpoint {
+                                               remote-endpoint = <&lvds0_in>;
+                                       };
+                               };
+                       };
+               };
+
+               lvds0: lvds-encoder@feb90000 {
+                       compatible = "renesas,r8a77980-lvds";
+                       reg = <0 0xfeb90000 0 0x14>;
+                       clocks = <&cpg CPG_MOD 727>;
+                       power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
+                       resets = <&cpg 727>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                                       lvds0_in: endpoint {
+                                               remote-endpoint =
+                                                       <&du_out_lvds0>;
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+                                       lvds0_out: endpoint {
+                                       };
+                               };
+                       };
+               };
+
+               prr: chipid@fff00044 {
+                       compatible = "renesas,prr";
+                       reg = <0 0xfff00044 0 4>;
+               };
+       };
+
+       thermal-zones {
+               thermal-sensor-1 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+                       thermal-sensors = <&tsc 0>;
+
+                       trips {
+                               sensor1-passive {
+                                       temperature = <95000>;
+                                       hysteresis = <1000>;
+                                       type = "passive";
+                               };
+                               sensor1-critical {
+                                       temperature = <120000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+
+               thermal-sensor-2 {
+                       polling-delay-passive = <250>;
+                       polling-delay = <1000>;
+                       thermal-sensors = <&tsc 1>;
+
+                       trips {
+                               sensor2-passive {
+                                       temperature = <95000>;
+                                       hysteresis = <1000>;
+                                       type = "passive";
+                               };
+                               sensor2-critical {
+                                       temperature = <120000>;
+                                       hysteresis = <1000>;
+                                       type = "critical";
+                               };
+                       };
+               };
+       };
+
+       timer {
+               compatible = "arm,armv8-timer";
+               interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
+                                      IRQ_TYPE_LEVEL_LOW)>,
+                                     <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
+                                      IRQ_TYPE_LEVEL_LOW)>,
+                                     <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
+                                      IRQ_TYPE_LEVEL_LOW)>,
+                                     <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
+                                      IRQ_TYPE_LEVEL_LOW)>;
+       };
+};
diff --git a/include/dt-bindings/clock/r8a77980-cpg-mssr.h b/include/dt-bindings/clock/r8a77980-cpg-mssr.h
new file mode 100644 (file)
index 0000000..a4c0d76
--- /dev/null
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ */
+#ifndef __DT_BINDINGS_CLOCK_R8A77980_CPG_MSSR_H__
+#define __DT_BINDINGS_CLOCK_R8A77980_CPG_MSSR_H__
+
+#include <dt-bindings/clock/renesas-cpg-mssr.h>
+
+/* r8a77980 CPG Core Clocks */
+#define R8A77980_CLK_Z2                        0
+#define R8A77980_CLK_ZR                        1
+#define R8A77980_CLK_ZTR               2
+#define R8A77980_CLK_ZTRD2             3
+#define R8A77980_CLK_ZT                        4
+#define R8A77980_CLK_ZX                        5
+#define R8A77980_CLK_S0D1              6
+#define R8A77980_CLK_S0D2              7
+#define R8A77980_CLK_S0D3              8
+#define R8A77980_CLK_S0D4              9
+#define R8A77980_CLK_S0D6              10
+#define R8A77980_CLK_S0D12             11
+#define R8A77980_CLK_S0D24             12
+#define R8A77980_CLK_S1D1              13
+#define R8A77980_CLK_S1D2              14
+#define R8A77980_CLK_S1D4              15
+#define R8A77980_CLK_S2D1              16
+#define R8A77980_CLK_S2D2              17
+#define R8A77980_CLK_S2D4              18
+#define R8A77980_CLK_S3D1              19
+#define R8A77980_CLK_S3D2              20
+#define R8A77980_CLK_S3D4              21
+#define R8A77980_CLK_LB                        22
+#define R8A77980_CLK_CL                        23
+#define R8A77980_CLK_ZB3               24
+#define R8A77980_CLK_ZB3D2             25
+#define R8A77980_CLK_ZB3D4             26
+#define R8A77980_CLK_SD0H              27
+#define R8A77980_CLK_SD0               28
+#define R8A77980_CLK_RPC               29
+#define R8A77980_CLK_RPCD2             30
+#define R8A77980_CLK_MSO               31
+#define R8A77980_CLK_CANFD             32
+#define R8A77980_CLK_CSI0              33
+#define R8A77980_CLK_CP                        34
+#define R8A77980_CLK_CPEX              35
+#define R8A77980_CLK_R                 36
+#define R8A77980_CLK_OSC               37
+
+#endif /* __DT_BINDINGS_CLOCK_R8A77980_CPG_MSSR_H__ */
diff --git a/include/dt-bindings/power/r8a77980-sysc.h b/include/dt-bindings/power/r8a77980-sysc.h
new file mode 100644 (file)
index 0000000..e12c858
--- /dev/null
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0
+ *
+ * Copyright (C) 2018 Renesas Electronics Corp.
+ * Copyright (C) 2018 Cogent Embedded, Inc.
+ */
+#ifndef __DT_BINDINGS_POWER_R8A77980_SYSC_H__
+#define __DT_BINDINGS_POWER_R8A77980_SYSC_H__
+
+/*
+ * These power domain indices match the numbers of the interrupt bits
+ * representing the power areas in the various Interrupt Registers
+ * (e.g. SYSCISR, Interrupt Status Register)
+ */
+
+#define R8A77980_PD_A2SC2              0
+#define R8A77980_PD_A2SC3              1
+#define R8A77980_PD_A2SC4              2
+#define R8A77980_PD_A2DP0              3
+#define R8A77980_PD_A2DP1              4
+#define R8A77980_PD_CA53_CPU0          5
+#define R8A77980_PD_CA53_CPU1          6
+#define R8A77980_PD_CA53_CPU2          7
+#define R8A77980_PD_CA53_CPU3          8
+#define R8A77980_PD_A2CN               10
+#define R8A77980_PD_A3VIP0             11
+#define R8A77980_PD_A2IR5              12
+#define R8A77980_PD_CR7                        13
+#define R8A77980_PD_A2IR4              15
+#define R8A77980_PD_CA53_SCU           21
+#define R8A77980_PD_A2IR0              23
+#define R8A77980_PD_A3IR               24
+#define R8A77980_PD_A3VIP1             25
+#define R8A77980_PD_A3VIP2             26
+#define R8A77980_PD_A2IR1              27
+#define R8A77980_PD_A2IR2              28
+#define R8A77980_PD_A2IR3              29
+#define R8A77980_PD_A2SC0              30
+#define R8A77980_PD_A2SC1              31
+
+/* Always-on power area */
+#define R8A77980_PD_ALWAYS_ON          32
+
+#endif /* __DT_BINDINGS_POWER_R8A77980_SYSC_H__ */