value = LLVMBuildShuffleVector(ctx->ac.builder, value, value, swizzle, "");
}
}
- assert(!src.negate);
- assert(!src.abs);
return value;
}
assert(bitsize == 1 || bitsize == 8 || bitsize == 16 || bitsize == 32 ||
bitsize == 64);
- assert(!(src.negate || src.abs));
assert(channel < comps);
return agx_extract_nir_src(b, src.src, channel);
struct qreg r = ntq_get_src(c, instr->src[src].src,
instr->src[src].swizzle[0]);
- assert(!instr->src[src].abs);
- assert(!instr->src[src].negate);
-
return r;
};
nir_alu_instr *instr)
{
nir_src_copy(&dest->src, &src->src, instr ? &instr->instr : NULL);
- dest->abs = src->abs;
- dest->negate = src->negate;
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
dest->swizzle[i] = src->swizzle[i];
}
unsigned num_components = nir_ssa_alu_instr_src_components(alu, srcn);
return src->src.is_ssa && (src->src.ssa->num_components == num_components) &&
- !src->abs && !src->negate &&
(memcmp(src->swizzle, trivial_swizzle, num_components) == 0);
}
alu_src_init(nir_alu_src *src)
{
src_init(&src->src);
- src->abs = src->negate = false;
for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
src->swizzle[i] = i;
}
bool
nir_alu_instr_is_copy(nir_alu_instr *instr)
{
-
- if (instr->op == nir_op_mov) {
- return !instr->src[0].abs &&
- !instr->src[0].negate;
- } else if (nir_op_is_vec(instr->op)) {
- for (unsigned i = 0; i < instr->dest.dest.ssa.num_components; i++) {
- if (instr->src[i].abs || instr->src[i].negate)
- return false;
- }
- return true;
- } else {
- return false;
- }
+ return (instr->op == nir_op_mov) || nir_op_is_vec(instr->op);
}
nir_ssa_scalar
nir_src src;
/**
- * \name input modifiers
- */
- /*@{*/
- /**
- * For inputs interpreted as floating point, flips the sign bit. For
- * inputs interpreted as integers, performs the two's complement negation.
- */
- bool negate;
-
- /**
- * Clears the sign bit for floating point values, and computes the integer
- * absolute value for integers. Note that the negate modifier acts after
- * the absolute value modifier, therefore if both are set then all inputs
- * will become negative.
- */
- bool abs;
- /*@}*/
-
- /**
* For each input component, says which component of the register it is
* chosen from.
*
uint8_t input_sizes[NIR_ALU_MAX_INPUTS];
/**
- * The type of vector that each input takes. Note that negate and
- * absolute value are only allowed on inputs with int or float type and
- * behave differently on the two.
+ * The type of vector that each input takes.
*/
nir_alu_type input_types[NIR_ALU_MAX_INPUTS];
static inline nir_ssa_def *
nir_mov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
{
- assert(!src.abs && !src.negate);
if (src.src.is_ssa && src.src.ssa->num_components == num_components) {
bool any_swizzles = false;
for (unsigned i = 0; i < num_components; i++) {
for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
__clone_src(state, &nalu->instr, &nalu->src[i].src, &alu->src[i].src);
- nalu->src[i].negate = alu->src[i].negate;
- nalu->src[i].abs = alu->src[i].abs;
memcpy(nalu->src[i].swizzle, alu->src[i].swizzle,
sizeof(nalu->src[i].swizzle));
}
static uint32_t
hash_alu_src(uint32_t hash, const nir_alu_src *src, unsigned num_components)
{
- hash = HASH(hash, src->abs);
- hash = HASH(hash, src->negate);
-
for (unsigned i = 0; i < num_components; i++)
hash = HASH(hash, src->swizzle[i]);
}
#endif
- if (alu1->src[src1].abs != alu2->src[src2].abs)
- return false;
-
- bool parity = alu1->src[src1].negate != alu2->src[src2].negate;
+ bool parity = false;
/* Handling load_const instructions is tricky. */
nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
unsigned src1, unsigned src2)
{
- if (alu1->src[src1].abs != alu2->src[src2].abs ||
- alu1->src[src1].negate != alu2->src[src2].negate)
- return false;
-
for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
if (alu1->src[src1].swizzle[i] != alu2->src[src2].swizzle[i])
return false;
nir_legacy_alu_src
nir_legacy_chase_alu_src(const nir_alu_src *src, bool fuse_fabs)
{
- assert(!src->abs && "source modifiers must be ALU");
- assert(!src->negate && "source modifiers must be ALU");
assert(src->src.is_ssa && "registers lowered to intrinsics");
if (src->src.ssa->parent_instr->type == nir_instr_type_alu) {
return false;
}
}
-
- /* We shouldn't have any source modifiers in the optimization loop. */
- assert(!alu->src[i].abs && !alu->src[i].negate);
}
if (bit_size == 0)
if (!vec->src[i].src.is_ssa)
continue;
- /* We can't rewrite a source if it has modifiers */
- if (vec->src[i].abs || vec->src[i].negate)
- continue;
-
srcs_remaining |= 1 << i;
}
j++) {
src[i][j] = load_const->value[alu->src[i].swizzle[j]];
}
-
- /* We shouldn't have any source modifiers in the optimization loop. */
- assert(!alu->src[i].abs && !alu->src[i].negate);
}
if (bit_size == 0)
for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
nalu->src[i].src = nir_src_for_ssa(src_defs[i]);
- nalu->src[i].negate = alu->src[i].negate;
- nalu->src[i].abs = alu->src[i].abs;
memcpy(nalu->src[i].swizzle, alu->src[i].swizzle,
sizeof(nalu->src[i].swizzle));
}
nir_alu_instr *alu = nir_instr_as_alu(val.def->parent_instr);
if (alu->op != nir_op_iadd ||
!alu->src[0].src.is_ssa ||
- !alu->src[1].src.is_ssa ||
- alu->src[0].negate || alu->src[0].abs ||
- alu->src[1].negate || alu->src[1].abs)
+ !alu->src[1].src.is_ssa)
return val;
nir_ssa_scalar src[2] = {
hash_alu_src(uint32_t hash, const nir_alu_src *src,
uint32_t num_components, uint32_t max_vec)
{
- assert(!src->abs && !src->negate);
-
/* hash whether a swizzle accesses elements beyond the maximum
* vectorization factor:
* For example accesses to .x and .y are considered different variables
alu_srcs_equal(const nir_alu_src *src1, const nir_alu_src *src2,
uint32_t max_vec)
{
- assert(!src1->abs);
- assert(!src1->negate);
- assert(!src2->abs);
- assert(!src2->negate);
-
uint32_t mask = ~(max_vec - 1);
if ((src1->swizzle[0] & mask) != (src2->swizzle[0] & mask))
return false;
if (state->variables[var->variable].src.ssa != instr->src[src].src.ssa)
return false;
- assert(!instr->src[src].abs && !instr->src[src].negate);
-
for (unsigned i = 0; i < num_components; ++i) {
if (state->variables[var->variable].swizzle[i] != new_swizzle[i])
return false;
state->variables_seen |= (1 << var->variable);
state->variables[var->variable].src = instr->src[src].src;
- state->variables[var->variable].abs = false;
- state->variables[var->variable].negate = false;
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i) {
if (i < num_components)
nir_alu_src val;
val.src = nir_src_for_ssa(&alu->dest.dest.ssa);
- val.negate = false;
- val.abs = false,
memcpy(val.swizzle, identity_swizzle, sizeof val.swizzle);
return val;
nir_alu_src val;
val.src = nir_src_for_ssa(cval);
- val.negate = false;
- val.abs = false,
memset(val.swizzle, 0, sizeof val.swizzle);
return val;
{
nir_alu_src *src = &instr->src[index];
- if (instr->op == nir_op_mov)
- assert(!src->abs && !src->negate);
-
unsigned num_components = nir_src_num_components(src->src);
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
validate_assert(state, src->swizzle[i] < NIR_MAX_VEC_COMPONENTS);
for (int i = 0; i < info->num_inputs; i++) {
nir_alu_src *asrc = &alu->src[i];
- compile_assert(ctx, !asrc->abs);
- compile_assert(ctx, !asrc->negate);
-
src[i] = ir3_get_src(ctx, &asrc->src)[asrc->swizzle[0]];
if (!src[i])
src[i] = create_immed_typed(ctx->block, 0, dst_type);
unsigned chan = ffs(alu->dest.write_mask) - 1;
nir_alu_src *asrc = &alu->src[i];
- compile_assert(ctx, !asrc->abs);
- compile_assert(ctx, !asrc->negate);
-
src[i] = ir3_get_src(ctx, &asrc->src)[asrc->swizzle[chan]];
bs[i] = nir_src_bit_size(asrc->src);
nir_alu_src src,
unsigned num_components)
{
- assert(!src.negate);
- assert(!src.abs);
assert(num_components >= 1);
assert(num_components <= 4);
if (alu->op == nir_op_iadd) {
for (int i = 0; i < 2; i++) {
- assert(!alu->src[i].negate && !alu->src[i].abs);
nir_const_value *v = nir_src_as_const_value(alu->src[i].src);
if (v != NULL) {
*src = alu->src[1 - i].src;
nir_alu_src *asrc = &alu->src[i];
hw_src src;
- assert(!asrc->negate);
- assert(!asrc->abs);
-
src = src_swizzle(get_src(c, &asrc->src), ALU_SWIZ(asrc));
src = src_swizzle(src, dst_swiz);
nir_alu_instr *mov = nir_alu_instr_create(shader, nir_op_mov);
nir_alu_src_copy(&mov->src[0], &vec->src[start_idx], mov);
- assert(!vec->src[start_idx].negate);
- assert(!vec->src[start_idx].abs);
-
mov->src[0].swizzle[0] = vec->src[start_idx].swizzle[0];
if (is_src_mod_neg(&vec->instr, start_idx))
alu_src_consume_abs(instr, i);
/* Apply modifiers from the parent source */
- if (parent->src[0].negate || is_src_mod_neg(&parent->instr, 0))
+ if (is_src_mod_neg(&parent->instr, 0))
alu_src_consume_negate(instr, i);
- if (parent->src[0].abs || is_src_mod_abs(&parent->instr, 0))
+ if (is_src_mod_abs(&parent->instr, 0))
alu_src_consume_abs(instr, i);
for (int j = 0; j < 4; ++j) {
for (int i = 0; i < num_child; i++) {
nir_alu_src *src = instr->src + i;
- node->children_negate[i] = src->negate;
gpir_node *child = gpir_node_find(block, &src->src, src->swizzle[0]);
node->children[i] = child;
struct qreg r = ntq_get_src(c, instr->src[src].src,
instr->src[src].swizzle[0]);
- assert(!instr->src[src].abs);
- assert(!instr->src[src].negate);
-
return r;
};
static SpvId
get_alu_src_raw(struct ntv_context *ctx, nir_alu_instr *alu, unsigned src, nir_alu_type *atype)
{
- assert(!alu->src[src].negate);
- assert(!alu->src[src].abs);
-
SpvId def = get_src(ctx, &alu->src[src].src, atype);
unsigned used_channels = 0;
nir_dest_bit_size(instr->dest.dest)));
for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
- /* We don't lower to source modifiers so they should not exist. */
- assert(!instr->src[i].abs);
- assert(!instr->src[i].negate);
-
op[i] = get_nir_src(instr->src[i].src);
op[i].type = brw_type_for_nir_type(devinfo,
(nir_alu_type)(nir_op_infos[instr->op].input_types[i] |
if (!alu->src[0].src.is_ssa ||
!alu->src[1].src.is_ssa ||
- alu->src[0].negate ||
- alu->src[0].abs ||
alu->src[0].swizzle[0] != 0 ||
- alu->src[1].negate ||
- alu->src[1].abs ||
alu->src[1].swizzle[0] != 0)
break;
uint8_t *swizzle, bool *negate, bool *abs)
{
uint8_t swizzle_tmp[NIR_MAX_VEC_COMPONENTS];
- assert(src->src.is_ssa && !src->abs && !src->negate);
nir_instr *instr = src->src.ssa->parent_instr;
if (instr->type != nir_instr_type_alu)
src_reg op[4];
for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
- /* We don't lower to source modifiers, so they shouldn't exist. */
- assert(!instr->src[i].abs);
- assert(!instr->src[i].negate);
-
nir_alu_type src_type = (nir_alu_type)
(nir_op_infos[instr->op].input_types[i] |
nir_src_bit_size(instr->src[i].src));
static const struct dxil_value *
get_alu_src(struct ntd_context *ctx, nir_alu_instr *alu, unsigned src)
{
- assert(!alu->src[src].abs);
- assert(!alu->src[src].negate);
-
unsigned chan = alu->src[src].swizzle[0];
return get_src(ctx, &alu->src[src].src, chan,
nir_op_infos[alu->op].input_types[src]);
Value*
Converter::getSrc(nir_alu_src *src, uint8_t component)
{
- if (src->abs || src->negate) {
- ERROR("modifiers currently not supported on nir_alu_src\n");
- assert(false);
- }
return getSrc(&src->src, src->swizzle[component]);
}
static bi_index
bi_alu_src_index(bi_builder *b, nir_alu_src src, unsigned comps)
{
- /* we don't lower modifiers until the backend */
- assert(!(src.negate || src.abs));
-
unsigned bitsize = nir_src_bit_size(src.src);
/* the bi_index carries the 32-bit (word) offset separate from the