drm/nouveau/disp: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
index bdf051566fc6cb060bbe58cd3fbf6f6fe4585821..db77bc29f5d1036e760979273882220f061bbff7 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/device.h
@@ -60,7 +60,6 @@ struct nvkm_device {
                struct notifier_block nb;
        } acpi;
 
-       struct nvkm_disp *disp;
        struct nvkm_dma *dma;
        struct nvkm_fifo *fifo;
        struct nvkm_gr *gr;
@@ -119,7 +118,6 @@ struct nvkm_device_chip {
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
 
-       int (*disp    )(struct nvkm_device *, int idx, struct nvkm_disp **);
        int (*dma     )(struct nvkm_device *, int idx, struct nvkm_dma **);
        int (*fifo    )(struct nvkm_device *, int idx, struct nvkm_fifo **);
        int (*gr      )(struct nvkm_device *, int idx, struct nvkm_gr **);

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
index 5bc38542b849fe230ea36426e64fb8bfb2f4fa6c..da3e4873cf4a6e5f327a6cd51d7b9d20a53dd58b 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/core/layout.h
@@ -28,4 +28,5 @@ NVKM_LAYOUT_ONCE(NVKM_SUBDEV_GSP     , struct nvkm_gsp     ,      gsp)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_BSP     , struct nvkm_engine  ,      bsp)
 NVKM_LAYOUT_INST(NVKM_ENGINE_CE      , struct nvkm_engine  ,       ce, 9)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_CIPHER  , struct nvkm_engine  ,   cipher)
+NVKM_LAYOUT_ONCE(NVKM_ENGINE_DISP    , struct nvkm_disp    ,     disp)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_VP      , struct nvkm_engine  ,       vp)

diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h
index 17288ea947c1da37ca27ad50e443cb83dfabc63d..d08d3337ba0d0ea1cc8aded5bdf3f8e948250001 100644 (file)
--- a/drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h
+++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h
@@ -23,22 +23,22 @@ struct nvkm_disp {
        } client;
 };
 
-int nv04_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int nv50_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int g84_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gt200_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int g94_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int mcp77_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gt215_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int mcp89_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gf119_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gk104_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gk110_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gm107_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gm200_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gp100_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gp102_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gv100_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int tu102_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int ga102_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
+int nv04_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int nv50_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int g84_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int gt200_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int g94_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int mcp77_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int gt215_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int mcp89_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int gf119_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int gk104_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int gk110_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int gm107_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int gm200_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int gp100_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int gp102_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int gv100_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int tu102_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
+int ga102_disp_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_disp **);
 #endif

diff --git a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
index e9990235d1f813e1735bdc446492a9dfe7d47156..264587dbc0949cfa27a800cf07a2c737f5889634 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
+++ b/drivers/gpu/drm/nouveau/nvkm/core/subdev.c
@@ -33,7 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
 #include <core/layout.h>
 #undef NVKM_LAYOUT_ONCE
 #undef NVKM_LAYOUT_INST
-       [NVKM_ENGINE_DISP    ] = "disp",
        [NVKM_ENGINE_DMAOBJ  ] = "dma",
        [NVKM_ENGINE_FIFO    ] = "fifo",
        [NVKM_ENGINE_GR      ] = "gr",

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 159d048fd7a667ba6824b70ff61100eb0c599160..9a916463919e4e66fce991f5f092cbc2fad102c7 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -88,7 +88,7 @@ nv4_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv04_fifo_new,
        .gr = nv04_gr_new,
@@ -109,7 +109,7 @@ nv5_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv04_fifo_new,
        .gr = nv04_gr_new,
@@ -131,7 +131,7 @@ nv10_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .gr = nv10_gr_new,
 };
@@ -151,7 +151,7 @@ nv11_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv10_fifo_new,
        .gr = nv15_gr_new,
@@ -173,7 +173,7 @@ nv15_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv10_fifo_new,
        .gr = nv15_gr_new,
@@ -195,7 +195,7 @@ nv17_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv17_gr_new,
@@ -217,7 +217,7 @@ nv18_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv17_gr_new,
@@ -239,7 +239,7 @@ nv1a_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv10_fifo_new,
        .gr = nv15_gr_new,
@@ -261,7 +261,7 @@ nv1f_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv17_gr_new,
@@ -283,7 +283,7 @@ nv20_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv20_gr_new,
@@ -305,7 +305,7 @@ nv25_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv25_gr_new,
@@ -327,7 +327,7 @@ nv28_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv25_gr_new,
@@ -349,7 +349,7 @@ nv2a_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv2a_gr_new,
@@ -371,7 +371,7 @@ nv30_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv30_gr_new,
@@ -393,7 +393,7 @@ nv31_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv30_gr_new,
@@ -416,7 +416,7 @@ nv34_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv34_gr_new,
@@ -439,7 +439,7 @@ nv35_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv35_gr_new,
@@ -461,7 +461,7 @@ nv36_chipset = {
        .mmu      = { 0x00000001, nv04_mmu_new },
        .pci      = { 0x00000001, nv04_pci_new },
        .timer    = { 0x00000001, nv04_timer_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv17_fifo_new,
        .gr = nv35_gr_new,
@@ -486,7 +486,7 @@ nv40_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv40_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv40_gr_new,
@@ -512,7 +512,7 @@ nv41_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv40_gr_new,
@@ -538,7 +538,7 @@ nv42_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv40_gr_new,
@@ -564,7 +564,7 @@ nv43_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv40_gr_new,
@@ -590,7 +590,7 @@ nv44_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv44_gr_new,
@@ -616,7 +616,7 @@ nv45_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv40_gr_new,
@@ -642,7 +642,7 @@ nv46_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv44_gr_new,
@@ -668,7 +668,7 @@ nv47_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv40_gr_new,
@@ -694,7 +694,7 @@ nv49_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv40_gr_new,
@@ -720,7 +720,7 @@ nv4a_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv44_gr_new,
@@ -746,7 +746,7 @@ nv4b_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv40_gr_new,
@@ -772,7 +772,7 @@ nv4c_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv44_gr_new,
@@ -798,7 +798,7 @@ nv4e_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv44_gr_new,
@@ -827,7 +827,7 @@ nv50_chipset = {
        .therm    = { 0x00000001, nv50_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv50_disp_new,
+       .disp     = { 0x00000001, nv50_disp_new },
        .dma = nv50_dma_new,
        .fifo = nv50_fifo_new,
        .gr = nv50_gr_new,
@@ -853,7 +853,7 @@ nv63_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv44_gr_new,
@@ -879,7 +879,7 @@ nv67_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv44_gr_new,
@@ -905,7 +905,7 @@ nv68_chipset = {
        .therm    = { 0x00000001, nv40_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = nv04_disp_new,
+       .disp     = { 0x00000001, nv04_disp_new },
        .dma = nv04_dma_new,
        .fifo = nv40_fifo_new,
        .gr = nv44_gr_new,
@@ -936,7 +936,7 @@ nv84_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .bsp      = { 0x00000001, g84_bsp_new },
        .cipher   = { 0x00000001, g84_cipher_new },
-       .disp = g84_disp_new,
+       .disp     = { 0x00000001, g84_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = g84_gr_new,
@@ -968,7 +968,7 @@ nv86_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .bsp      = { 0x00000001, g84_bsp_new },
        .cipher   = { 0x00000001, g84_cipher_new },
-       .disp = g84_disp_new,
+       .disp     = { 0x00000001, g84_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = g84_gr_new,
@@ -1000,7 +1000,7 @@ nv92_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .bsp      = { 0x00000001, g84_bsp_new },
        .cipher   = { 0x00000001, g84_cipher_new },
-       .disp = g84_disp_new,
+       .disp     = { 0x00000001, g84_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = g84_gr_new,
@@ -1032,7 +1032,7 @@ nv94_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .bsp      = { 0x00000001, g84_bsp_new },
        .cipher   = { 0x00000001, g84_cipher_new },
-       .disp = g94_disp_new,
+       .disp     = { 0x00000001, g94_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = g84_gr_new,
@@ -1064,7 +1064,7 @@ nv96_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .bsp      = { 0x00000001, g84_bsp_new },
        .cipher   = { 0x00000001, g84_cipher_new },
-       .disp = g94_disp_new,
+       .disp     = { 0x00000001, g94_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = g84_gr_new,
@@ -1094,7 +1094,7 @@ nv98_chipset = {
        .therm    = { 0x00000001, g84_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = g94_disp_new,
+       .disp     = { 0x00000001, g94_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = g84_gr_new,
@@ -1128,7 +1128,7 @@ nva0_chipset = {
        .volt     = { 0x00000001, nv40_volt_new },
        .bsp      = { 0x00000001, g84_bsp_new },
        .cipher   = { 0x00000001, g84_cipher_new },
-       .disp = gt200_disp_new,
+       .disp     = { 0x00000001, gt200_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = gt200_gr_new,
@@ -1160,7 +1160,7 @@ nva3_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
        .ce       = { 0x00000001, gt215_ce_new },
-       .disp = gt215_disp_new,
+       .disp     = { 0x00000001, gt215_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = gt215_gr_new,
@@ -1194,7 +1194,7 @@ nva5_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
        .ce       = { 0x00000001, gt215_ce_new },
-       .disp = gt215_disp_new,
+       .disp     = { 0x00000001, gt215_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = gt215_gr_new,
@@ -1227,7 +1227,7 @@ nva8_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
        .ce       = { 0x00000001, gt215_ce_new },
-       .disp = gt215_disp_new,
+       .disp     = { 0x00000001, gt215_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = gt215_gr_new,
@@ -1258,7 +1258,7 @@ nvaa_chipset = {
        .therm    = { 0x00000001, g84_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = mcp77_disp_new,
+       .disp     = { 0x00000001, mcp77_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = gt200_gr_new,
@@ -1290,7 +1290,7 @@ nvac_chipset = {
        .therm    = { 0x00000001, g84_therm_new },
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
-       .disp = mcp77_disp_new,
+       .disp     = { 0x00000001, mcp77_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = mcp79_gr_new,
@@ -1324,7 +1324,7 @@ nvaf_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, nv40_volt_new },
        .ce       = { 0x00000001, gt215_ce_new },
-       .disp = mcp89_disp_new,
+       .disp     = { 0x00000001, mcp89_disp_new },
        .dma = nv50_dma_new,
        .fifo = g84_fifo_new,
        .gr = mcp89_gr_new,
@@ -1360,7 +1360,7 @@ nvc0_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
        .ce       = { 0x00000003, gf100_ce_new },
-       .disp = gt215_disp_new,
+       .disp     = { 0x00000001, gt215_disp_new },
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
        .gr = gf100_gr_new,
@@ -1396,7 +1396,7 @@ nvc1_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
        .ce       = { 0x00000001, gf100_ce_new },
-       .disp = gt215_disp_new,
+       .disp     = { 0x00000001, gt215_disp_new },
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
        .gr = gf108_gr_new,
@@ -1432,7 +1432,7 @@ nvc3_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
        .ce       = { 0x00000001, gf100_ce_new },
-       .disp = gt215_disp_new,
+       .disp     = { 0x00000001, gt215_disp_new },
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
        .gr = gf104_gr_new,
@@ -1468,7 +1468,7 @@ nvc4_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
        .ce       = { 0x00000003, gf100_ce_new },
-       .disp = gt215_disp_new,
+       .disp     = { 0x00000001, gt215_disp_new },
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
        .gr = gf104_gr_new,
@@ -1504,7 +1504,7 @@ nvc8_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
        .ce       = { 0x00000003, gf100_ce_new },
-       .disp = gt215_disp_new,
+       .disp     = { 0x00000001, gt215_disp_new },
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
        .gr = gf110_gr_new,
@@ -1540,7 +1540,7 @@ nvce_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
        .ce       = { 0x00000003, gf100_ce_new },
-       .disp = gt215_disp_new,
+       .disp     = { 0x00000001, gt215_disp_new },
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
        .gr = gf104_gr_new,
@@ -1576,7 +1576,7 @@ nvcf_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
        .ce       = { 0x00000001, gf100_ce_new },
-       .disp = gt215_disp_new,
+       .disp     = { 0x00000001, gt215_disp_new },
        .dma = gf100_dma_new,
        .fifo = gf100_fifo_new,
        .gr = gf104_gr_new,
@@ -1611,7 +1611,7 @@ nvd7_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf117_volt_new },
        .ce       = { 0x00000001, gf100_ce_new },
-       .disp = gf119_disp_new,
+       .disp     = { 0x00000001, gf119_disp_new },
        .dma = gf119_dma_new,
        .fifo = gf100_fifo_new,
        .gr = gf117_gr_new,
@@ -1647,7 +1647,7 @@ nvd9_chipset = {
        .timer    = { 0x00000001, nv41_timer_new },
        .volt     = { 0x00000001, gf100_volt_new },
        .ce       = { 0x00000001, gf100_ce_new },
-       .disp = gf119_disp_new,
+       .disp     = { 0x00000001, gf119_disp_new },
        .dma = gf119_dma_new,
        .fifo = gf100_fifo_new,
        .gr = gf119_gr_new,
@@ -1684,7 +1684,7 @@ nve4_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000007, gk104_ce_new },
-       .disp = gk104_disp_new,
+       .disp     = { 0x00000001, gk104_disp_new },
        .dma = gf119_dma_new,
        .fifo = gk104_fifo_new,
        .gr = gk104_gr_new,
@@ -1721,7 +1721,7 @@ nve6_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000007, gk104_ce_new },
-       .disp = gk104_disp_new,
+       .disp     = { 0x00000001, gk104_disp_new },
        .dma = gf119_dma_new,
        .fifo = gk104_fifo_new,
        .gr = gk104_gr_new,
@@ -1758,7 +1758,7 @@ nve7_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000007, gk104_ce_new },
-       .disp = gk104_disp_new,
+       .disp     = { 0x00000001, gk104_disp_new },
        .dma = gf119_dma_new,
        .fifo = gk104_fifo_new,
        .gr = gk104_gr_new,
@@ -1820,7 +1820,7 @@ nvf0_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000007, gk104_ce_new },
-       .disp = gk110_disp_new,
+       .disp     = { 0x00000001, gk110_disp_new },
        .dma = gf119_dma_new,
        .fifo = gk110_fifo_new,
        .gr = gk110_gr_new,
@@ -1856,7 +1856,7 @@ nvf1_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000007, gk104_ce_new },
-       .disp = gk110_disp_new,
+       .disp     = { 0x00000001, gk110_disp_new },
        .dma = gf119_dma_new,
        .fifo = gk110_fifo_new,
        .gr = gk110b_gr_new,
@@ -1892,7 +1892,7 @@ nv106_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000007, gk104_ce_new },
-       .disp = gk110_disp_new,
+       .disp     = { 0x00000001, gk110_disp_new },
        .dma = gf119_dma_new,
        .fifo = gk208_fifo_new,
        .gr = gk208_gr_new,
@@ -1928,7 +1928,7 @@ nv108_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000007, gk104_ce_new },
-       .disp = gk110_disp_new,
+       .disp     = { 0x00000001, gk110_disp_new },
        .dma = gf119_dma_new,
        .fifo = gk208_fifo_new,
        .gr = gk208_gr_new,
@@ -1964,7 +1964,7 @@ nv117_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000005, gm107_ce_new },
-       .disp = gm107_disp_new,
+       .disp     = { 0x00000001, gm107_disp_new },
        .dma = gf119_dma_new,
        .fifo = gm107_fifo_new,
        .gr = gm107_gr_new,
@@ -1999,7 +1999,7 @@ nv118_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000005, gm107_ce_new },
-       .disp = gm107_disp_new,
+       .disp     = { 0x00000001, gm107_disp_new },
        .dma = gf119_dma_new,
        .fifo = gm107_fifo_new,
        .gr = gm107_gr_new,
@@ -2032,7 +2032,7 @@ nv120_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000007, gm200_ce_new },
-       .disp = gm200_disp_new,
+       .disp     = { 0x00000001, gm200_disp_new },
        .dma = gf119_dma_new,
        .fifo = gm200_fifo_new,
        .gr = gm200_gr_new,
@@ -2068,7 +2068,7 @@ nv124_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000007, gm200_ce_new },
-       .disp = gm200_disp_new,
+       .disp     = { 0x00000001, gm200_disp_new },
        .dma = gf119_dma_new,
        .fifo = gm200_fifo_new,
        .gr = gm200_gr_new,
@@ -2104,7 +2104,7 @@ nv126_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .volt     = { 0x00000001, gk104_volt_new },
        .ce       = { 0x00000007, gm200_ce_new },
-       .disp = gm200_disp_new,
+       .disp     = { 0x00000001, gm200_disp_new },
        .dma = gf119_dma_new,
        .fifo = gm200_fifo_new,
        .gr = gm200_gr_new,
@@ -2163,7 +2163,7 @@ nv130_chipset = {
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x0000003f, gp100_ce_new },
        .dma = gf119_dma_new,
-       .disp = gp100_disp_new,
+       .disp     = { 0x00000001, gp100_disp_new },
        .fifo = gp100_fifo_new,
        .gr = gp100_gr_new,
        .nvdec[0] = gm107_nvdec_new,
@@ -2197,7 +2197,7 @@ nv132_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x0000000f, gp102_ce_new },
-       .disp = gp102_disp_new,
+       .disp     = { 0x00000001, gp102_disp_new },
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
        .gr = gp102_gr_new,
@@ -2232,7 +2232,7 @@ nv134_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x0000000f, gp102_ce_new },
-       .disp = gp102_disp_new,
+       .disp     = { 0x00000001, gp102_disp_new },
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
        .gr = gp104_gr_new,
@@ -2267,7 +2267,7 @@ nv136_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x0000000f, gp102_ce_new },
-       .disp = gp102_disp_new,
+       .disp     = { 0x00000001, gp102_disp_new },
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
        .gr = gp104_gr_new,
@@ -2301,7 +2301,7 @@ nv137_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x0000000f, gp102_ce_new },
-       .disp = gp102_disp_new,
+       .disp     = { 0x00000001, gp102_disp_new },
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
        .gr = gp107_gr_new,
@@ -2336,7 +2336,7 @@ nv138_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x0000000f, gp102_ce_new },
-       .disp = gp102_disp_new,
+       .disp     = { 0x00000001, gp102_disp_new },
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
        .gr = gp108_gr_new,
@@ -2394,7 +2394,7 @@ nv140_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x000001ff, gv100_ce_new },
-       .disp = gv100_disp_new,
+       .disp     = { 0x00000001, gv100_disp_new },
        .dma = gv100_dma_new,
        .fifo = gv100_fifo_new,
        .gr = gv100_gr_new,
@@ -2430,7 +2430,7 @@ nv162_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x0000001f, tu102_ce_new },
-       .disp = tu102_disp_new,
+       .disp     = { 0x00000001, tu102_disp_new },
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
        .gr = tu102_gr_new,
@@ -2464,7 +2464,7 @@ nv164_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x0000001f, tu102_ce_new },
-       .disp = tu102_disp_new,
+       .disp     = { 0x00000001, tu102_disp_new },
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
        .gr = tu102_gr_new,
@@ -2499,7 +2499,7 @@ nv166_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x0000001f, tu102_ce_new },
-       .disp = tu102_disp_new,
+       .disp     = { 0x00000001, tu102_disp_new },
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
        .gr = tu102_gr_new,
@@ -2535,7 +2535,7 @@ nv167_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x0000001f, tu102_ce_new },
-       .disp = tu102_disp_new,
+       .disp     = { 0x00000001, tu102_disp_new },
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
        .gr = tu102_gr_new,
@@ -2569,7 +2569,7 @@ nv168_chipset = {
        .timer    = { 0x00000001, gk20a_timer_new },
        .top      = { 0x00000001, gk104_top_new },
        .ce       = { 0x0000001f, tu102_ce_new },
-       .disp = tu102_disp_new,
+       .disp     = { 0x00000001, tu102_disp_new },
        .dma = gv100_dma_new,
        .fifo = tu102_fifo_new,
        .gr = tu102_gr_new,
@@ -2610,7 +2610,7 @@ nv172_chipset = {
        .mmu      = { 0x00000001, tu102_mmu_new },
        .pci      = { 0x00000001, gp100_pci_new },
        .timer    = { 0x00000001, gk20a_timer_new },
-       .disp = ga102_disp_new,
+       .disp     = { 0x00000001, ga102_disp_new },
        .dma = gv100_dma_new,
 };
 
@@ -2629,7 +2629,7 @@ nv174_chipset = {
        .mmu      = { 0x00000001, tu102_mmu_new },
        .pci      = { 0x00000001, gp100_pci_new },
        .timer    = { 0x00000001, gk20a_timer_new },
-       .disp = ga102_disp_new,
+       .disp     = { 0x00000001, ga102_disp_new },
        .dma = gv100_dma_new,
 };
 
@@ -3174,7 +3174,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 #include <core/layout.h>
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
-               _(NVKM_ENGINE_DISP    ,     disp);
                _(NVKM_ENGINE_DMAOBJ  ,      dma);
                _(NVKM_ENGINE_FIFO    ,     fifo);
                _(NVKM_ENGINE_GR      ,       gr);

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c
index 8540e289728c58052885f4c170ea68ba25715519..5daa777552767caf53ab04af65d6568efe0d1d22 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c
@@ -473,7 +473,7 @@ nvkm_disp = {
 
 int
 nvkm_disp_ctor(const struct nvkm_disp_func *func, struct nvkm_device *device,
-              int index, struct nvkm_disp *disp)
+              enum nvkm_subdev_type type, int inst, struct nvkm_disp *disp)
 {
        disp->func = func;
        INIT_LIST_HEAD(&disp->head);
@@ -481,14 +481,14 @@ nvkm_disp_ctor(const struct nvkm_disp_func *func, struct nvkm_device *device,
        INIT_LIST_HEAD(&disp->outp);
        INIT_LIST_HEAD(&disp->conn);
        spin_lock_init(&disp->client.lock);
-       return nvkm_engine_ctor(&nvkm_disp, device, index, true, &disp->engine);
+       return nvkm_engine_ctor(&nvkm_disp, device, type, inst, true, &disp->engine);
 }
 
 int
 nvkm_disp_new_(const struct nvkm_disp_func *func, struct nvkm_device *device,
-              int index, struct nvkm_disp **pdisp)
+              enum nvkm_subdev_type type, int inst, struct nvkm_disp **pdisp)
 {
        if (!(*pdisp = kzalloc(sizeof(**pdisp), GFP_KERNEL)))
                return -ENOMEM;
-       return nvkm_disp_ctor(func, device, index, *pdisp);
+       return nvkm_disp_ctor(func, device, type, inst, *pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c
index 731f188fc1ee7d69fe959dd28d8d67c0855d8890..156bbe8b2de3e2107f8aa5df88682afb7069364b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c
@@ -41,7 +41,8 @@ g84_disp = {
 };
 
 int
-g84_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+g84_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+            struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&g84_disp, device, index, pdisp);
+       return nv50_disp_new_(&g84_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c
index def54fe1951ec36641ec6a140b86bcff5e3f4c7c..3425b5d3bc72f65ef19e5a69f503669cf4737c46 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c
@@ -41,7 +41,8 @@ g94_disp = {
 };
 
 int
-g94_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+g94_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+            struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&g94_disp, device, index, pdisp);
+       return nv50_disp_new_(&g94_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c
index aa2e5645fe365929b44849d8407d5443ad0103f7..68aa52588d92fe202a15328ce74a8c33dc9fdb8c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c
@@ -40,7 +40,8 @@ ga102_disp = {
 };
 
 int
-ga102_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+ga102_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&ga102_disp, device, index, pdisp);
+       return nv50_disp_new_(&ga102_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
index e675d9b9d5d70f92b342bbea98a233449ffb8b85..a6bafe7fea1f2bd34f30c8b2e5d4902b739b027c 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
@@ -266,7 +266,8 @@ gf119_disp = {
 };
 
 int
-gf119_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+gf119_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&gf119_disp, device, index, pdisp);
+       return nv50_disp_new_(&gf119_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
index 4c3439b1a62da6d7472ed7869b2cd3c2576f3ac5..3b79cf233ac5a7044cff1535ddfd59b9ef3e96d0 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c
@@ -41,7 +41,8 @@ gk104_disp = {
 };
 
 int
-gk104_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+gk104_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&gk104_disp, device, index, pdisp);
+       return nv50_disp_new_(&gk104_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c
index bc6f4750c942eb57e8c34f1f5c0b90787e94921e..988eb12237a6edf976c865fc9ad6ba31ded6cec5 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c
@@ -41,7 +41,8 @@ gk110_disp = {
 };
 
 int
-gk110_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+gk110_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&gk110_disp, device, index, pdisp);
+       return nv50_disp_new_(&gk110_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
index 031cf6b03a76680f045b222440622df752f9731c..5d8108feeacdb9cdc0102582eff2be33b7116b33 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c
@@ -41,7 +41,8 @@ gm107_disp = {
 };
 
 int
-gm107_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+gm107_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&gm107_disp, device, index, pdisp);
+       return nv50_disp_new_(&gm107_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c
index ec9c33a5162d798e87c816fbb8e03b7e626b5588..f7bb660874768e32526121d7385eee7cda8fc3ad 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c
@@ -41,7 +41,8 @@ gm200_disp = {
 };
 
 int
-gm200_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+gm200_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&gm200_disp, device, index, pdisp);
+       return nv50_disp_new_(&gm200_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c
index 8471de3f3b616cf54a4742c500efafa164ab4c15..af0ca812a39497c147a2957c5eb44ca6b7d6a12e 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c
@@ -40,7 +40,8 @@ gp100_disp = {
 };
 
 int
-gp100_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+gp100_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&gp100_disp, device, index, pdisp);
+       return nv50_disp_new_(&gp100_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c
index a3779c5046ead129dd42aa87b801f66f774d7d36..065fea1bdfd12b996268d99aab34b3ca6d6241d4 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c
@@ -67,7 +67,8 @@ gp102_disp = {
 };
 
 int
-gp102_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+gp102_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&gp102_disp, device, index, pdisp);
+       return nv50_disp_new_(&gp102_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c
index f80183701f448dc36b7a921e2d811a2ae41e9feb..22bc269df64acba2aae6525bafced3e13ccd0094 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c
@@ -41,7 +41,8 @@ gt200_disp = {
 };
 
 int
-gt200_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+gt200_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&gt200_disp, device, index, pdisp);
+       return nv50_disp_new_(&gt200_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c
index 7581efc1357e90d355625374097e43dd5da67df8..63a912b174d7fff0636866e74599e6436912d45f 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c
@@ -41,7 +41,8 @@ gt215_disp = {
 };
 
 int
-gt215_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+gt215_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&gt215_disp, device, index, pdisp);
+       return nv50_disp_new_(&gt215_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
index c1032527f79111aaa237cfd51e33b01f574eebf4..53879d5271cf730b0352b72990d6b95929798a3d 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c
@@ -441,7 +441,8 @@ gv100_disp = {
 };
 
 int
-gv100_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+gv100_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&gv100_disp, device, index, pdisp);
+       return nv50_disp_new_(&gv100_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c
index cfdce23ab83a6a4bacb3f60ae3ba4f54556c1fc9..762a59f24bbb4f68c07c9ce4a1c4e9ec706a5e61 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c
@@ -39,7 +39,8 @@ mcp77_disp = {
 };
 
 int
-mcp77_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+mcp77_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&mcp77_disp, device, index, pdisp);
+       return nv50_disp_new_(&mcp77_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c
index 85d9329cfa0e1507d258b8473f16a2178a1046b6..e5c58aae15de64960421fdae2572c2a345e3184f 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c
@@ -39,7 +39,8 @@ mcp89_disp = {
 };
 
 int
-mcp89_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+mcp89_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&mcp89_disp, device, index, pdisp);
+       return nv50_disp_new_(&mcp89_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c
index b780ba1a3bc7fa31f2338bf184955dfc18e80be2..a12097db2c2a76f96d1750134284a2177a8dc415 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c
@@ -64,11 +64,12 @@ nv04_disp = {
 };
 
 int
-nv04_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+nv04_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+             struct nvkm_disp **pdisp)
 {
        int ret, i;
 
-       ret = nvkm_disp_new_(&nv04_disp, device, index, pdisp);
+       ret = nvkm_disp_new_(&nv04_disp, device, type, inst, pdisp);
        if (ret)
                return ret;
 

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
index e21556bf2cb1a1442d4c8d85908a14f03f06c02a..3f20e49070ced83aa61a577d76e2db5338feb892 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
@@ -154,7 +154,7 @@ nv50_disp_ = {
 
 int
 nv50_disp_new_(const struct nv50_disp_func *func, struct nvkm_device *device,
-              int index, struct nvkm_disp **pdisp)
+              enum nvkm_subdev_type type, int inst, struct nvkm_disp **pdisp)
 {
        struct nv50_disp *disp;
        int ret;
@@ -164,7 +164,7 @@ nv50_disp_new_(const struct nv50_disp_func *func, struct nvkm_device *device,
        disp->func = func;
        *pdisp = &disp->base;
 
-       ret = nvkm_disp_ctor(&nv50_disp_, device, index, &disp->base);
+       ret = nvkm_disp_ctor(&nv50_disp_, device, type, inst, &disp->base);
        if (ret)
                return ret;
 
@@ -769,7 +769,8 @@ nv50_disp = {
 };
 
 int
-nv50_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+nv50_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+             struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&nv50_disp, device, index, pdisp);
+       return nv50_disp_new_(&nv50_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h
index db31b37752a270b163b9b1ea8366546bef2470fa..025cacd7c3b012567f27a52db045f4bf27ff2115 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h
@@ -47,8 +47,8 @@ void nv50_disp_super_2_1(struct nv50_disp *, struct nvkm_head *);
 void nv50_disp_super_2_2(struct nv50_disp *, struct nvkm_head *);
 void nv50_disp_super_3_0(struct nv50_disp *, struct nvkm_head *);
 
-int nv50_disp_new_(const struct nv50_disp_func *, struct nvkm_device *,
-                  int index, struct nvkm_disp **);
+int nv50_disp_new_(const struct nv50_disp_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
+                  struct nvkm_disp **);
 
 struct nv50_disp_func {
        int (*init)(struct nv50_disp *);

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h
index f815a534288097599d850415f0081df8a6cd39a6..ec57d8b6bce9311dde08d326f482c15f0e282278 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h
@@ -4,10 +4,10 @@
 #include <engine/disp.h>
 #include "outp.h"
 
-int nvkm_disp_ctor(const struct nvkm_disp_func *, struct nvkm_device *,
-                  int index, struct nvkm_disp *);
-int nvkm_disp_new_(const struct nvkm_disp_func *, struct nvkm_device *,
-                  int index, struct nvkm_disp **);
+int nvkm_disp_ctor(const struct nvkm_disp_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
+                  struct nvkm_disp *);
+int nvkm_disp_new_(const struct nvkm_disp_func *, struct nvkm_device *, enum nvkm_subdev_type, int,
+                  struct nvkm_disp **);
 void nvkm_disp_vblank(struct nvkm_disp *, int head);
 
 struct nvkm_disp_func {

diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c
index 4c85d1d4fbd4265cabd179923519412766473114..f5f8dc8e8f35d315b8e7114ee1b28dc9573feb5b 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c
@@ -146,7 +146,8 @@ tu102_disp = {
 };
 
 int
-tu102_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+tu102_disp_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
+              struct nvkm_disp **pdisp)
 {
-       return nv50_disp_new_(&tu102_disp, device, index, pdisp);
+       return nv50_disp_new_(&tu102_disp, device, type, inst, pdisp);
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c
index a04c3bf1f92d38327b9e84a60e8d2cb4af792ec0..09e8a5c743a4ace40a0197b8ff13b9a6dbc46bba 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c
@@ -42,7 +42,7 @@ g84_devinit_disable(struct nvkm_devinit *init)
        }
 
        if (!(r00154c & 0x00000004))
-               disable |= (1ULL << NVKM_ENGINE_DISP);
+               nvkm_subdev_disable(device, NVKM_ENGINE_DISP, 0);
        if (!(r00154c & 0x00000020))
                nvkm_subdev_disable(device, NVKM_ENGINE_BSP, 0);
        if (!(r00154c & 0x00000040))

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c
index ba810cb1f386af066a2929faa1a8f4aaf3fbdbcf..710eead0ce636ca55ef6742820ee1744eff53170 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c
@@ -41,7 +41,7 @@ g98_devinit_disable(struct nvkm_devinit *init)
        }
 
        if (!(r00154c & 0x00000004))
-               disable |= (1ULL << NVKM_ENGINE_DISP);
+               nvkm_subdev_disable(device, NVKM_ENGINE_DISP, 0);
        if (!(r00154c & 0x00000020))
                disable |= (1ULL << NVKM_ENGINE_MSVLD);
        if (!(r00154c & 0x00000040))

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
index c60af0060ec663a3965d12806d1d8eaed2274e2c..023bfbfd3b29bb9db347ca08589b6e63b94a8d09 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
@@ -71,7 +71,7 @@ gf100_devinit_disable(struct nvkm_devinit *init)
        u64 disable = 0ULL;
 
        if (r022500 & 0x00000001)
-               disable |= (1ULL << NVKM_ENGINE_DISP);
+               nvkm_subdev_disable(device, NVKM_ENGINE_DISP, 0);
 
        if (r022500 & 0x00000002) {
                disable |= (1ULL << NVKM_ENGINE_MSPDEC);

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
index 0b567431d08796b8823a90905fca488fe7357d39..4323732a3cb22897b3ec035e4cfe7081847c1fb0 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
@@ -39,7 +39,7 @@ gm107_devinit_disable(struct nvkm_devinit *init)
        if (r021c00 & 0x00000004)
                nvkm_subdev_disable(device, NVKM_ENGINE_CE, 2);
        if (r021c04 & 0x00000001)
-               disable |= (1ULL << NVKM_ENGINE_DISP);
+               nvkm_subdev_disable(device, NVKM_ENGINE_DISP, 0);
 
        return disable;
 }

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
index d9189cfaa7d2b012f42c57585cd1502b4b89706a..ecaa6f8f7c5b750eb7c8bc6ac4cf44dae89f4d19 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gt215.c
@@ -76,7 +76,7 @@ gt215_devinit_disable(struct nvkm_devinit *init)
        }
 
        if (!(r00154c & 0x00000004))
-               disable |= (1ULL << NVKM_ENGINE_DISP);
+               nvkm_subdev_disable(device, NVKM_ENGINE_DISP, 0);
        if (!(r00154c & 0x00000020))
                disable |= (1ULL << NVKM_ENGINE_MSVLD);
        if (!(r00154c & 0x00000200))

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c
index e7829eeaecc13f61369ca2cf0ea22cdb1f8a726f..6f4a49ae75483f2c720abf770e01c33bfb12eccc 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/mcp89.c
@@ -40,7 +40,7 @@ mcp89_devinit_disable(struct nvkm_devinit *init)
        }
 
        if (!(r00154c & 0x00000004))
-               disable |= (1ULL << NVKM_ENGINE_DISP);
+               nvkm_subdev_disable(device, NVKM_ENGINE_DISP, 0);
        if (!(r00154c & 0x00000020))
                disable |= (1ULL << NVKM_ENGINE_MSVLD);
        if (!(r00154c & 0x00000040))

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c
index 4f25e930339d4827b41355a9f55d98c2f93b6343..088bdae042d3ceb44ad2d3cf5047ff3b70d06bcc 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.c
@@ -101,8 +101,8 @@ nv50_devinit_preinit(struct nvkm_devinit *base)
         * missing, assume it's a secondary gpu which requires post
         */
        if (!base->post) {
-               u64 disable = nvkm_devinit_disable(base);
-               if (disable & (1ULL << NVKM_ENGINE_DISP))
+               nvkm_devinit_disable(base);
+               if (!device->disp)
                        base->post = true;
        }
 

diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c
index 34a354599ee2b1b95eb10a34b7be0156d47e5864..2b678b60b4d3e15e91528bfb789fd2d4f303f741 100644 (file)
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgk104.c
@@ -260,7 +260,7 @@ gk104_ram_calc_gddr5(struct gk104_ram *ram, u32 freq)
        ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000);
        ram_block(fuc);
 
-       if (nvkm_device_engine(ram->base.fb->subdev.device, NVKM_ENGINE_DISP, 0))
+       if (ram->base.fb->subdev.device->disp)
                ram_wr32(fuc, 0x62c000, 0x0f0f0000);
 
        /* MR1: turn termination on early, for some reason.. */
@@ -661,7 +661,7 @@ gk104_ram_calc_gddr5(struct gk104_ram *ram, u32 freq)
 
        ram_unblock(fuc);
 
-       if (nvkm_device_engine(ram->base.fb->subdev.device, NVKM_ENGINE_DISP, 0))
+       if (ram->base.fb->subdev.device->disp)
                ram_wr32(fuc, 0x62c000, 0x0f0f0f00);
 
        if (next->bios.rammap_11_08_01)
@@ -711,7 +711,7 @@ gk104_ram_calc_sddr3(struct gk104_ram *ram, u32 freq)
        ram_mask(fuc, 0x10f808, 0x40000000, 0x40000000);
        ram_block(fuc);
 
-       if (nvkm_device_engine(ram->base.fb->subdev.device, NVKM_ENGINE_DISP, 0))
+       if (ram->base.fb->subdev.device->disp)
                ram_wr32(fuc, 0x62c000, 0x0f0f0000);
 
        if (vc == 1 && ram_have(fuc, gpio2E)) {
@@ -943,7 +943,7 @@ gk104_ram_calc_sddr3(struct gk104_ram *ram, u32 freq)
 
        ram_unblock(fuc);
 
-       if (nvkm_device_engine(ram->base.fb->subdev.device, NVKM_ENGINE_DISP, 0))
+       if (ram->base.fb->subdev.device->disp)
                ram_wr32(fuc, 0x62c000, 0x0f0f0f00);
 
        if (next->bios.rammap_11_08_01)