drm/v3d: Don't try to set OVRTMUOUT on V3D 4.x.
authorEric Anholt <eric@anholt.net>
Wed, 20 Feb 2019 23:36:57 +0000 (15:36 -0800)
committerEric Anholt <eric@anholt.net>
Fri, 8 Mar 2019 16:59:25 +0000 (08:59 -0800)
The old field is gone and the register now has a different field,
QRMAXCNT for how many TMU requests get serviced before thread switch.
We were accidentally reducing it from its default of 0x3 (4 requests)
to 0x0 (1).

v2: Skip setting the reg at all on 4.x, instead of trying to update
    only the old field.

Signed-off-by: Eric Anholt <eric@anholt.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20190220233658.986-2-eric@anholt.net
Reviewed-by: Dave Emett <david.emett@broadcom.com>
drivers/gpu/drm/v3d/v3d_gem.c
drivers/gpu/drm/v3d/v3d_regs.h

index 0d1e5e0..0a83268 100644 (file)
@@ -24,7 +24,8 @@ v3d_init_core(struct v3d_dev *v3d, int core)
         * type.  If you want the default behavior, you can still put
         * "2" in the indirect texture state's output_type field.
         */
-       V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
+       if (v3d->ver < 40)
+               V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
 
        /* Whenever we flush the L2T cache, we always want to flush
         * the whole thing.
index 6ccdee9..8e88af2 100644 (file)
 # define V3D_IDENT2_BCG_INT                            BIT(28)
 
 #define V3D_CTL_MISCCFG                                0x00018
+# define V3D_CTL_MISCCFG_QRMAXCNT_MASK                 V3D_MASK(3, 1)
+# define V3D_CTL_MISCCFG_QRMAXCNT_SHIFT                1
 # define V3D_MISCCFG_OVRTMUOUT                         BIT(0)
 
 #define V3D_CTL_L2CACTL                                0x00020