radv: only allocate a 32-bit value for the TC-compat range metadata

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index eeccce0d82ff917a1914778708f991a74571afef..dc598d9eecf692480de22abc26873f92aea299f8 100644 (file)
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -990,8 +990,8 @@ radv_image_alloc_htile(struct radv_image *image)
                 * have to be fixed by updating ZRANGE_PRECISION when doing
                 * fast depth clears to 0.0f.
                 */
-               image->tc_compat_zrange_offset = image->clear_value_offset + 8;
-               image->size = image->clear_value_offset + 16;
+               image->tc_compat_zrange_offset = image->size;
+               image->size = image->tc_compat_zrange_offset + 4;
        }
        image->alignment = align64(image->alignment, image->planes[0].surface.htile_alignment);
 }