Cleanup feenableexcept to use the same logic as the ARM version. No functional changes.

diff --git a/ChangeLog b/ChangeLog
index ea29be2..2302d7e 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
 2014-10-24  Wilco Dijkstra  <wdijkstr@arm.com>
 
+       * sysdeps/aarch64/fpu/feenablxcpt.c (feenableexcept):
+       Simplify logic.
+
+2014-10-24  Wilco Dijkstra  <wdijkstr@arm.com>
+
        * sysdeps/aarch64/fpu/fedisblxcpt.c (fedisableexcept):
        Simplify logic.
 

diff --git a/sysdeps/aarch64/fpu/feenablxcpt.c b/sysdeps/aarch64/fpu/feenablxcpt.c
index 70e413c..763248f 100644 (file)
--- a/sysdeps/aarch64/fpu/feenablxcpt.c
+++ b/sysdeps/aarch64/fpu/feenablxcpt.c
@@ -24,14 +24,9 @@ feenableexcept (int excepts)
 {
   fpu_control_t fpcr;
   fpu_control_t fpcr_new;
-  int original_excepts;
 
   _FPU_GETCW (fpcr);
-
-  original_excepts = (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
-
   excepts &= FE_ALL_EXCEPT;
-
   fpcr_new = fpcr | (excepts << FE_EXCEPT_SHIFT);
 
   if (fpcr != fpcr_new)
@@ -50,5 +45,5 @@ feenableexcept (int excepts)
        return -1;
     }
 
-  return original_excepts;
+  return (fpcr >> FE_EXCEPT_SHIFT) & FE_ALL_EXCEPT;
 }