clk: qcom: gcc: Fix parent for gpll0_out_even
authorVinod Koul <vkoul@kernel.org>
Thu, 21 May 2020 05:27:28 +0000 (10:57 +0530)
committerStephen Boyd <sboyd@kernel.org>
Wed, 27 May 2020 00:15:06 +0000 (17:15 -0700)
Documentation says that gpll0 is parent of gpll0_out_even, somehow
driver coded that as bi_tcxo, so fix it

Fixes: 2a1d7eb854bb ("clk: qcom: gcc: Add global clock controller driver for SM8150")
Reported-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lkml.kernel.org/r/20200521052728.2141377-1-vkoul@kernel.org
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/qcom/gcc-sm8150.c

index ef98fdc..732bc7c 100644 (file)
@@ -76,8 +76,7 @@ static struct clk_alpha_pll_postdiv gpll0_out_even = {
        .clkr.hw.init = &(struct clk_init_data){
                .name = "gpll0_out_even",
                .parent_data = &(const struct clk_parent_data){
-                       .fw_name = "bi_tcxo",
-                       .name = "bi_tcxo",
+                       .hw = &gpll0.clkr.hw,
                },
                .num_parents = 1,
                .ops = &clk_trion_pll_postdiv_ops,