+2013-12-13 Nick Clifton <nickc@redhat.com>
+
+ * config/tc-msp430.c (mcu_types): Add some more 430X mcu names.
+ (OPTION_INTR_NOPS): Define.
+ (gen_interrupt_nops): Default to FALSE.
+ (md_parse_opton): Add support for OPTION_INTR_NOPS.
+ (md_longopts): Add -mn.
+ (md_show_usage): Add -mn.
+ (msp430_operands): Generate NOPs for all MCUs not just 430Xv2.
+ * doc/c-msp430.c: Document -mn.
+
2013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com>
Wei-Cheng Wang <cole945@gmail.com>
Hsiang-Kai Wang <hsiangkai@gmail.com>
{"msp430fg4618", MSP_ISA_430X},
{"msp430fg4619", MSP_ISA_430X},
+ {"msp430x241x", MSP_ISA_430X},
+ {"msp430x26x", MSP_ISA_430X},
+ {"msp430x461x1", MSP_ISA_430X},
+ {"msp430x46x", MSP_ISA_430X},
+ {"msp430x471x3", MSP_ISA_430X},
+ {"msp430x471x6", MSP_ISA_430X},
+ {"msp430x471x7", MSP_ISA_430X},
+ {"msp430xg46x", MSP_ISA_430X},
+
{"msp430f5418", MSP_ISA_430Xv2},
{"msp430f5419", MSP_ISA_430Xv2},
{"msp430f5435", MSP_ISA_430Xv2},
#define OPTION_POLYMORPHS 'P'
#define OPTION_LARGE 'l'
static bfd_boolean large_model = FALSE;
+#define OPTION_INTR_NOPS 'n'
#define OPTION_NO_INTR_NOPS 'N'
-static bfd_boolean gen_interrupt_nops = TRUE;
+static bfd_boolean gen_interrupt_nops = FALSE;
#define OPTION_MCPU 'c'
#define OPTION_MOVE_DATA 'd'
static bfd_boolean move_data = FALSE;
case OPTION_NO_INTR_NOPS:
gen_interrupt_nops = FALSE;
return 1;
+ case OPTION_INTR_NOPS:
+ gen_interrupt_nops = TRUE;
+ return 1;
case OPTION_MOVE_DATA:
move_data = TRUE;
{"mQ", no_argument, NULL, OPTION_RELAX},
{"ml", no_argument, NULL, OPTION_LARGE},
{"mN", no_argument, NULL, OPTION_NO_INTR_NOPS},
+ {"mn", no_argument, NULL, OPTION_INTR_NOPS},
{"md", no_argument, NULL, OPTION_MOVE_DATA},
{NULL, no_argument, NULL, 0}
};
fprintf (stream,
_(" -mN - disable generation of NOP after changing interrupts\n"));
fprintf (stream,
+ _(" -mn - enable generation of NOP after changing interrupts\n"));
+ fprintf (stream,
_(" -md - Force copying of data from ROM to RAM at startup\n"));
show_mcu_list (stream);
bfd_putl16 ((bfd_vma) bin, frag);
if (gen_interrupt_nops
- && target_is_430xv2 ()
&& (is_opcode ("eint") || is_opcode ("dint")))
{
/* Emit a NOP following interrupt enable/disable.
}
if (gen_interrupt_nops
- && target_is_430xv2 ()
&& is_opcode ("clr")
&& bin == 0x4302 /* CLR R2*/)
{
}
if (gen_interrupt_nops
- && target_is_430xv2 ()
&& ( (is_opcode ("bic") && bin == 0xc232)
|| (is_opcode ("bis") && bin == 0xd232)
|| (is_opcode ("mov") && op2.mode == OP_REG && op2.reg == 2)))
@item -ml
indicates that the input uses the large code model.
+@item -mn
+enables the generation of a NOP instruction following any instruction
+that might change the interrupts enabled/disabled state. The
+pipelined nature of the MSP430 core means that any instruction that
+changes the interrupt state (@code{EINT}, @code{DINT}, @code{BIC #8,
+SR}, @code{BIS #8, SR} or @code{MOV.W <>, SR}) must be
+followed by a NOP instruction in order to ensure the correct
+processing of interrupts. By default it is up to the programmer to
+supply these NOP instructions, but this command line option enables
+the automatic insertion by the assembler. Note - the assembler does
+not peek ahead to the next instruction so it will insert a NOP even
+one is already present.
+
+@c end-sanitize-msp430
+@c %redact note changed text for mN option
@item -mN
disables the generation of a NOP instruction following any instruction
-that might change the interrupts enabled/disabled state. For the
-430Xv2 architecture the instructions: @code{EINT}, @code{DINT},
-@code{BIC #8, SR}, @code{BIS #8, SR} and @code{MOV.W <>, SR} must be
-followed by a NOP instruction in order to ensure the correct
-processing of interrupts. By default generation of the NOP
-instruction happens automatically, but this command line option
-disables this behaviour. It is then up to the programmer to ensure
-that interrupts are enabled and disabled correctly.
+that might change the interrupts enabled/disabled state. This is the
+default behaviour.
@item -md
mark the object file as one that requires data to copied from ROM to