platform: thead/c910: Don't set plic/clint address in warm boot
authorLiu Yibin <yibin_liu@c-sky.com>
Mon, 13 Jan 2020 03:20:57 +0000 (11:20 +0800)
committerAnup Patel <anup@brainfault.org>
Wed, 15 Jan 2020 00:18:44 +0000 (05:48 +0530)
Since all harts share the same plic/clint address now, setting
them during cold boot is just fine.

Signed-off-by: Liu Yibin <yibin_liu@c-sky.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
platform/thead/c910/platform.c

index 83cfc9d..9d73bf4 100644 (file)
@@ -34,6 +34,10 @@ static int c910_early_init(bool cold_boot)
                c910_regs.mccr2    = csr_read(CSR_MCCR2);
                c910_regs.mhint    = csr_read(CSR_MHINT);
                c910_regs.mxstatus = csr_read(CSR_MXSTATUS);
+
+               c910_regs.plic_base_addr = csr_read(CSR_PLIC_BASE);
+               c910_regs.clint_base_addr =
+                       c910_regs.plic_base_addr + C910_PLIC_CLINT_OFFSET;
        } else {
                /* Store to other core */
                csr_write(CSR_PMPADDR0, c910_regs.pmpaddr0);
@@ -52,10 +56,6 @@ static int c910_early_init(bool cold_boot)
                csr_write(CSR_MXSTATUS, c910_regs.mxstatus);
        }
 
-       c910_regs.plic_base_addr = csr_read(CSR_PLIC_BASE);
-       c910_regs.clint_base_addr =
-               c910_regs.plic_base_addr + C910_PLIC_CLINT_OFFSET;
-
        return 0;
 }