[masm] Inline ushr

Change-Id: Ia3855625e72ae7ed50b9890edbad11e2aa338930
Reviewed-by: Lars Knoll <lars.knoll@digia.com>

diff --git a/qv4isel_masm.cpp b/qv4isel_masm.cpp
index 1029d75..2fa506d 100644 (file)
--- a/qv4isel_masm.cpp
+++ b/qv4isel_masm.cpp
@@ -92,7 +92,7 @@ const InstructionSelection::BinaryOperationInfo InstructionSelection::binaryOper
 
     INLINE_OP(__qmljs_shl, &InstructionSelection::inline_shl32, &InstructionSelection::inline_shl32), // OpLShift
     INLINE_OP(__qmljs_shr, &InstructionSelection::inline_shr32, &InstructionSelection::inline_shr32), // OpRShift
-    OP(__qmljs_ushr), // OpURShift
+    INLINE_OP(__qmljs_ushr, &InstructionSelection::inline_ushr32, &InstructionSelection::inline_ushr32), // OpURShift
 
     OP(__qmljs_gt), // OpGt
     OP(__qmljs_lt), // OpLt

diff --git a/qv4isel_masm_p.h b/qv4isel_masm_p.h
index 48801d0..aa39a15 100644 (file)
--- a/qv4isel_masm_p.h
+++ b/qv4isel_masm_p.h
@@ -681,6 +681,21 @@ private:
         return Jump();
     }
 
+    Jump inline_ushr32(Address addr, RegisterID reg)
+    {
+        load32(addr, ScratchRegister);
+        and32(TrustedImm32(0x1f), ScratchRegister);
+        urshift32(ScratchRegister, reg);
+        return Jump();
+    }
+
+    Jump inline_ushr32(TrustedImm32 imm, RegisterID reg)
+    {
+        imm.m_value &= 0x1f;
+        urshift32(imm, reg);
+        return Jump();
+    }
+
     Jump inline_and32(Address addr, RegisterID reg)
     {
         and32(addr, reg);