usb: dwc3: core: add gfladj_refclk_lpm_sel quirk
authorAlexander Stein <alexander.stein@ew.tq-group.com>
Thu, 15 Sep 2022 06:28:53 +0000 (08:28 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 22 Sep 2022 13:52:30 +0000 (15:52 +0200)
This selects the SOF/ITP counter be running on ref_clk. As documented
U2_FREECLK_EXISTS has to be set to 0 as well.

Reviewed-by: Li Jun <jun.li@nxp.com>
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Link: https://lore.kernel.org/r/20220915062855.751881-3-alexander.stein@ew.tq-group.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/usb/dwc3/core.c
drivers/usb/dwc3/core.h

index 1fe966d..eeb065e 100644 (file)
@@ -408,6 +408,10 @@ static void dwc3_ref_clk_period(struct dwc3 *dwc)
        reg |= FIELD_PREP(DWC3_GFLADJ_REFCLK_FLADJ_MASK, fladj)
            |  FIELD_PREP(DWC3_GFLADJ_240MHZDECR, decr >> 1)
            |  FIELD_PREP(DWC3_GFLADJ_240MHZDECR_PLS1, decr & 1);
+
+       if (dwc->gfladj_refclk_lpm_sel)
+               reg |=  DWC3_GFLADJ_REFCLK_LPM_SEL;
+
        dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
 }
 
@@ -789,7 +793,7 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
        else
                reg |= DWC3_GUSB2PHYCFG_ENBLSLPM;
 
-       if (dwc->dis_u2_freeclk_exists_quirk)
+       if (dwc->dis_u2_freeclk_exists_quirk || dwc->gfladj_refclk_lpm_sel)
                reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
 
        dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
@@ -1525,6 +1529,8 @@ static void dwc3_get_properties(struct dwc3 *dwc)
                                "snps,dis-tx-ipgap-linecheck-quirk");
        dwc->parkmode_disable_ss_quirk = device_property_read_bool(dev,
                                "snps,parkmode-disable-ss-quirk");
+       dwc->gfladj_refclk_lpm_sel = device_property_read_bool(dev,
+                               "snps,gfladj-refclk-lpm-sel-quirk");
 
        dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,
                                "snps,tx_de_emphasis_quirk");
index 7c93681..d28c942 100644 (file)
 #define DWC3_GFLADJ_30MHZ_SDBND_SEL            BIT(7)
 #define DWC3_GFLADJ_30MHZ_MASK                 0x3f
 #define DWC3_GFLADJ_REFCLK_FLADJ_MASK          GENMASK(21, 8)
+#define DWC3_GFLADJ_REFCLK_LPM_SEL             BIT(23)
 #define DWC3_GFLADJ_240MHZDECR                 GENMASK(30, 24)
 #define DWC3_GFLADJ_240MHZDECR_PLS1            BIT(31)
 
@@ -1312,6 +1313,7 @@ struct dwc3 {
        unsigned                dis_del_phy_power_chg_quirk:1;
        unsigned                dis_tx_ipgap_linecheck_quirk:1;
        unsigned                parkmode_disable_ss_quirk:1;
+       unsigned                gfladj_refclk_lpm_sel:1;
 
        unsigned                tx_de_emphasis_quirk:1;
        unsigned                tx_de_emphasis:2;