dt-bindings: pci: qcom: Document PCIe bindings for SM8150 SoC
authorBhupesh Sharma <bhupesh.sharma@linaro.org>
Sat, 26 Mar 2022 06:08:09 +0000 (11:38 +0530)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 24 May 2022 21:35:50 +0000 (16:35 -0500)
Document the PCIe DT bindings for SM8150 SoC. The PCIe IP is similar to
the one used on SM8250.

Link: https://lore.kernel.org/r/20220326060810.1797516-2-bhupesh.sharma@linaro.org
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Documentation/devicetree/bindings/pci/qcom,pcie.txt

index 0adb56d5645e8f539767c308899151a667ae10dd..fd8b6d1912e75da6a5161359a71f372232f526d6 100644 (file)
@@ -14,6 +14,7 @@
                        - "qcom,pcie-qcs404" for qcs404
                        - "qcom,pcie-sc8180x" for sc8180x
                        - "qcom,pcie-sdm845" for sdm845
+                       - "qcom,pcie-sm8150" for sm8150
                        - "qcom,pcie-sm8250" for sm8250
                        - "qcom,pcie-sm8450-pcie0" for PCIe0 on sm8450
                        - "qcom,pcie-sm8450-pcie1" for PCIe1 on sm8450
                        - "pipe"        PIPE clock
 
 - clock-names:
-       Usage: required for sc8180x and sm8250
+       Usage: required for sc8180x, sm8150 and sm8250
        Value type: <stringlist>
        Definition: Should contain the following entries
                        - "aux"         Auxiliary clock
                        - "ahb"                 AHB reset
 
 - reset-names:
-       Usage: required for sc8180x, sdm845, sm8250 and sm8450
+       Usage: required for sc8180x, sdm845, sm8150, sm8250 and sm8450
        Value type: <stringlist>
        Definition: Should contain the following entries
                        - "pci"                 PCIe core reset