si_initialize_compute(sctx);
if (sctx->b.flags)
- si_emit_cache_flush(sctx, NULL);
+ si_emit_cache_flush(sctx);
if (!si_switch_compute_shader(sctx, program, &program->shader, info->pc))
return;
* Also wait for the previous CP DMA operations.
*/
if (sctx->b.flags) {
- si_emit_cache_flush(sctx, NULL);
+ si_emit_cache_flush(sctx);
*flags |= SI_CP_DMA_RAW_WAIT;
}
ctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2 |
SI_CONTEXT_INV_VMEM_L1;
- si_emit_cache_flush(ctx, NULL);
+ si_emit_cache_flush(ctx);
if (ctx->trace_buf)
si_trace_emit(ctx);
union si_state emitted;
/* Atom declarations. */
- struct r600_atom cache_flush;
struct si_framebuffer framebuffer;
struct si_sample_locs msaa_sample_locs;
struct r600_atom db_render_state;
si_init_external_atom(sctx, &sctx->b.scissors.atom, &sctx->atoms.s.scissors);
si_init_external_atom(sctx, &sctx->b.viewports.atom, &sctx->atoms.s.viewports);
- si_init_atom(sctx, &sctx->cache_flush, &sctx->atoms.s.cache_flush, si_emit_cache_flush);
si_init_atom(sctx, &sctx->framebuffer.atom, &sctx->atoms.s.framebuffer, si_emit_framebuffer_state);
si_init_atom(sctx, &sctx->msaa_sample_locs.atom, &sctx->atoms.s.msaa_sample_locs, si_emit_msaa_sample_locs);
si_init_atom(sctx, &sctx->db_render_state, &sctx->atoms.s.db_render_state, si_emit_db_render_state);
union si_state_atoms {
struct {
/* The order matters. */
- struct r600_atom *cache_flush;
struct r600_atom *render_cond;
struct r600_atom *streamout_begin;
struct r600_atom *streamout_enable; /* must be after streamout_begin */
void si_init_shader_selector_async(void *job, int thread_index);
/* si_state_draw.c */
-void si_emit_cache_flush(struct si_context *sctx, struct r600_atom *atom);
+void si_emit_cache_flush(struct si_context *sctx);
void si_ce_pre_draw_synchronization(struct si_context *sctx);
void si_ce_post_draw_synchronization(struct si_context *sctx);
void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo);
}
}
-void si_emit_cache_flush(struct si_context *sctx, struct r600_atom *atom)
+void si_emit_cache_flush(struct si_context *sctx)
{
struct r600_common_context *rctx = &sctx->b;
struct radeon_winsys_cs *cs = rctx->gfx.cs;
r600_resource(info->indirect_params)->TC_L2_dirty = false;
}
- /* Check flush flags. */
- if (sctx->b.flags)
- si_mark_atom_dirty(sctx, sctx->atoms.s.cache_flush);
-
/* Add buffer sizes for memory checking in need_cs_space. */
if (sctx->emit_scratch_reloc && sctx->scratch_buffer)
r600_context_add_resource_size(ctx, &sctx->scratch_buffer->b.b);
if (!si_upload_vertex_buffer_descriptors(sctx))
return;
+ /* Flushed caches prior to emitting states. */
+ if (sctx->b.flags)
+ si_emit_cache_flush(sctx);
+
/* Emit states. */
mask = sctx->dirty_atoms;
while (mask) {