#define VC4_PACKET_TILE_COORDINATES_SIZE 3
#define VC4_PACKET_GEM_HANDLES_SIZE 9
+/* Number of multisamples supported. */
+#define VC4_MAX_SAMPLES 4
+
#define VC4_MASK(high, low) (((1 << ((high) - (low) + 1)) - 1) << (low))
/* Using the GNU statement expression extension */
#define VC4_SET_FIELD(value, field) \
vc4_debug |= saved_shaderdb_flag;
+ vc4->sample_mask = (1 << VC4_MAX_SAMPLES) - 1;
+
return &vc4->base;
fail:
instr->const_index[0]);
break;
+ case nir_intrinsic_load_sample_mask_in:
+ *dest = qir_uniform(c, QUNIFORM_SAMPLE_MASK, 0);
+ break;
+
case nir_intrinsic_load_input:
assert(instr->num_components == 1);
if (instr->const_index[0] == VC4_NIR_TLB_COLOR_READ_INPUT) {
QUNIFORM_STENCIL,
QUNIFORM_ALPHA_REF,
+ QUNIFORM_SAMPLE_MASK,
};
struct vc4_varying_slot {
vc4_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask)
{
struct vc4_context *vc4 = vc4_context(pctx);
- vc4->sample_mask = (uint16_t)sample_mask;
+ vc4->sample_mask = sample_mask & ((1 << VC4_MAX_SAMPLES) - 1);
vc4->dirty |= VC4_DIRTY_SAMPLE_MASK;
}
cl_aligned_f(&uniforms,
vc4->zsa->base.alpha.ref_value);
break;
+
+ case QUNIFORM_SAMPLE_MASK:
+ cl_aligned_u32(&uniforms, vc4->sample_mask);
+ break;
}
#if 0
uint32_t written_val = *((uint32_t *)uniforms - 1);
case QUNIFORM_ALPHA_REF:
dirty |= VC4_DIRTY_ZSA;
break;
+
+ case QUNIFORM_SAMPLE_MASK:
+ dirty |= VC4_DIRTY_SAMPLE_MASK;
+ break;
}
}