x86/apic: Get rid of hard_smp_processor_id()
authorThomas Gleixner <tglx@linutronix.de>
Tue, 8 Aug 2023 22:03:43 +0000 (15:03 -0700)
committerDave Hansen <dave.hansen@linux.intel.com>
Wed, 9 Aug 2023 18:58:17 +0000 (11:58 -0700)
No point in having a wrapper around read_apic_id().

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Juergen Gross <jgross@suse.com> # Xen PV (dom0 and unpriv. guest)
arch/x86/include/asm/apic.h
arch/x86/include/asm/smp.h
arch/x86/kernel/apic/apic.c
arch/x86/kernel/apic/io_apic.c
arch/x86/kernel/apic/ipi.c
arch/x86/kernel/apic/vector.c
arch/x86/kernel/cpu/amd.c
arch/x86/kernel/cpu/hygon.c
arch/x86/kernel/smpboot.c
arch/x86/kernel/vsmp_64.c

index 36f0be7..b591040 100644 (file)
@@ -503,7 +503,11 @@ extern void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *r
 extern int default_cpu_present_to_apicid(int mps_cpu);
 extern int default_check_phys_apicid_present(int phys_apicid);
 
-#endif /* CONFIG_X86_LOCAL_APIC */
+#else /* CONFIG_X86_LOCAL_APIC */
+
+static inline unsigned int read_apic_id(void) { return 0; }
+
+#endif /* !CONFIG_X86_LOCAL_APIC */
 
 #ifdef CONFIG_SMP
 void apic_smt_update(void);
index 1db6faa..8d96d9a 100644 (file)
@@ -185,13 +185,6 @@ static inline struct cpumask *cpu_llc_shared_mask(int cpu)
 
 extern unsigned disabled_cpus;
 
-#ifdef CONFIG_X86_LOCAL_APIC
-extern int hard_smp_processor_id(void);
-
-#else /* CONFIG_X86_LOCAL_APIC */
-#define hard_smp_processor_id()        0
-#endif /* CONFIG_X86_LOCAL_APIC */
-
 #ifdef CONFIG_DEBUG_NMI_SELFTEST
 extern void nmi_selftest(void);
 #else
index 8af0ec8..ee64f8f 100644 (file)
@@ -2562,11 +2562,6 @@ int generic_processor_info(int apicid, int version)
        return cpu;
 }
 
-int hard_smp_processor_id(void)
-{
-       return read_apic_id();
-}
-
 void __irq_msi_compose_msg(struct irq_cfg *cfg, struct msi_msg *msg,
                           bool dmar)
 {
index 48975d5..a8b329a 100644 (file)
@@ -2095,7 +2095,7 @@ static inline void __init unlock_ExtINT_logic(void)
        entry0 = ioapic_read_entry(apic, pin);
        clear_IO_APIC_pin(apic, pin);
 
-       apic_id = hard_smp_processor_id();
+       apic_id = read_apic_id();
        memset(&entry1, 0, sizeof(entry1));
 
        entry1.dest_mode_logical        = true;
index 2a6509e..29273e0 100644 (file)
@@ -320,7 +320,7 @@ int safe_smp_processor_id(void)
        if (!boot_cpu_has(X86_FEATURE_APIC))
                return 0;
 
-       apicid = hard_smp_processor_id();
+       apicid = read_apic_id();
        if (apicid == BAD_APICID)
                return 0;
 
index 04655b7..71feae7 100644 (file)
@@ -1208,7 +1208,7 @@ static void __init print_local_APIC(void *dummy)
        u64 icr;
 
        pr_debug("printing local APIC contents on CPU#%d/%d:\n",
-                smp_processor_id(), hard_smp_processor_id());
+                smp_processor_id(), read_apic_id());
        v = apic_read(APIC_ID);
        pr_info("... APIC ID:      %08x (%01x)\n", v, read_apic_id());
        v = apic_read(APIC_LVR);
index 26ad7ca..5861eea 100644 (file)
@@ -1042,7 +1042,7 @@ static void init_amd(struct cpuinfo_x86 *c)
                set_cpu_cap(c, X86_FEATURE_FSRS);
 
        /* get apicid instead of initial apic id from cpuid */
-       c->apicid = hard_smp_processor_id();
+       c->apicid = read_apic_id();
 
        /* K6s reports MCEs but don't actually have all the MSRs */
        if (c->x86 < 6)
index 5a2962c..defdc59 100644 (file)
@@ -8,6 +8,7 @@
  */
 #include <linux/io.h>
 
+#include <asm/apic.h>
 #include <asm/cpu.h>
 #include <asm/smp.h>
 #include <asm/numa.h>
@@ -300,7 +301,7 @@ static void init_hygon(struct cpuinfo_x86 *c)
        set_cpu_cap(c, X86_FEATURE_REP_GOOD);
 
        /* get apicid instead of initial apic id from cpuid */
-       c->apicid = hard_smp_processor_id();
+       c->apicid = read_apic_id();
 
        /*
         * XXX someone from Hygon needs to confirm this DTRT
index e1aa2cd..8229f41 100644 (file)
@@ -1220,11 +1220,11 @@ static void __init smp_sanity_check(void)
        }
 #endif
 
-       if (!physid_isset(hard_smp_processor_id(), phys_cpu_present_map)) {
+       if (!physid_isset(read_apic_id(), phys_cpu_present_map)) {
                pr_warn("weird, boot CPU (#%d) not listed by the BIOS\n",
-                       hard_smp_processor_id());
+                       read_apic_id());
 
-               physid_set(hard_smp_processor_id(), phys_cpu_present_map);
+               physid_set(read_apic_id(), phys_cpu_present_map);
        }
 
        /*
@@ -1234,7 +1234,7 @@ static void __init smp_sanity_check(void)
        if (!apic->check_phys_apicid_present(boot_cpu_physical_apicid)) {
                pr_notice("weird, boot CPU (#%d) not listed by the BIOS\n",
                          boot_cpu_physical_apicid);
-               physid_set(hard_smp_processor_id(), phys_cpu_present_map);
+               physid_set(read_apic_id(), phys_cpu_present_map);
        }
        preempt_enable();
 }
@@ -1439,7 +1439,7 @@ __init void prefill_possible_map(void)
        if (!num_processors) {
                if (boot_cpu_has(X86_FEATURE_APIC)) {
                        int apicid = boot_cpu_physical_apicid;
-                       int cpu = hard_smp_processor_id();
+                       int cpu = read_apic_id();
 
                        pr_warn("Boot CPU (id %d) not listed by BIOS\n", cpu);
 
index 796cfaa..65e96b7 100644 (file)
@@ -129,7 +129,7 @@ static void __init vsmp_cap_cpus(void)
 
 static int apicid_phys_pkg_id(int initial_apic_id, int index_msb)
 {
-       return hard_smp_processor_id() >> index_msb;
+       return read_apic_id() >> index_msb;
 }
 
 static void vsmp_apic_post_init(void)