r600g: don't use register mask for PA_SU_SC_MODE_CNTL

It's always emitted in draw_vbo.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index a5a443c..09e029f 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -884,6 +884,12 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx,
                return NULL;
        }
 
+       polygon_dual_mode = (state->fill_front != PIPE_POLYGON_MODE_FILL ||
+                               state->fill_back != PIPE_POLYGON_MODE_FILL);
+
+       if (state->flatshade_first)
+               prov_vtx = 0;
+
        rstate = &rs->rstate;
        rs->flatshade = state->flatshade;
        rs->sprite_coord_enable = state->sprite_coord_enable;
@@ -892,6 +898,17 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx,
        rs->pa_sc_line_stipple = state->line_stipple_enable ?
                                S_028A0C_LINE_PATTERN(state->line_stipple_pattern) |
                                S_028A0C_REPEAT_COUNT(state->line_stipple_factor) : 0;
+       rs->pa_su_sc_mode_cntl =
+               S_028814_PROVOKING_VTX_LAST(prov_vtx) |
+               S_028814_CULL_FRONT(state->rasterizer_discard || (state->cull_face & PIPE_FACE_FRONT) ? 1 : 0) |
+               S_028814_CULL_BACK(state->rasterizer_discard || (state->cull_face & PIPE_FACE_BACK) ? 1 : 0) |
+               S_028814_FACE(!state->front_ccw) |
+               S_028814_POLY_OFFSET_FRONT_ENABLE(state->offset_tri) |
+               S_028814_POLY_OFFSET_BACK_ENABLE(state->offset_tri) |
+               S_028814_POLY_OFFSET_PARA_ENABLE(state->offset_tri) |
+               S_028814_POLY_MODE(polygon_dual_mode) |
+               S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |
+               S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back));
 
        clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
 
@@ -900,8 +917,6 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx,
        rs->offset_scale = state->offset_scale * 12.0f;
 
        rstate->id = R600_PIPE_STATE_RASTERIZER;
-       if (state->flatshade_first)
-               prov_vtx = 0;
        tmp = S_0286D4_FLAT_SHADE_ENA(1);
        if (state->sprite_coord_enable) {
                tmp |= S_0286D4_PNT_SPRITE_ENA(1) |
@@ -915,19 +930,6 @@ static void *evergreen_create_rs_state(struct pipe_context *ctx,
        }
        r600_pipe_state_add_reg(rstate, R_0286D4_SPI_INTERP_CONTROL_0, tmp, 0xFFFFFFFF, NULL, 0);
 
-       polygon_dual_mode = (state->fill_front != PIPE_POLYGON_MODE_FILL ||
-                               state->fill_back != PIPE_POLYGON_MODE_FILL);
-       r600_pipe_state_add_reg(rstate, R_028814_PA_SU_SC_MODE_CNTL,
-               S_028814_PROVOKING_VTX_LAST(prov_vtx) |
-               S_028814_CULL_FRONT(state->rasterizer_discard || (state->cull_face & PIPE_FACE_FRONT) ? 1 : 0) |
-               S_028814_CULL_BACK(state->rasterizer_discard || (state->cull_face & PIPE_FACE_BACK) ? 1 : 0) |
-               S_028814_FACE(!state->front_ccw) |
-               S_028814_POLY_OFFSET_FRONT_ENABLE(state->offset_tri) |
-               S_028814_POLY_OFFSET_BACK_ENABLE(state->offset_tri) |
-               S_028814_POLY_OFFSET_PARA_ENABLE(state->offset_tri) |
-               S_028814_POLY_MODE(polygon_dual_mode) |
-               S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |
-               S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back)), 0xFFFFFFFF, NULL, 0);
        r600_pipe_state_add_reg(rstate, R_028820_PA_CL_NANINF_CNTL, 0x00000000, 0xFFFFFFFF, NULL, 0);
        /* point size 12.4 fixed point */
        tmp = (unsigned)(state->point_size * 8.0);

diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index d4578bd..e4eaf94 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -110,6 +110,7 @@ struct r600_pipe_rasterizer {
        unsigned                        sprite_coord_enable;
        unsigned                        clip_plane_enable;
        unsigned                        pa_sc_line_stipple;
+       unsigned                        pa_su_sc_mode_cntl;
        float                           offset_units;
        float                           offset_scale;
 };
@@ -211,6 +212,7 @@ struct r600_pipe_context {
        unsigned                        cb_target_mask;
        unsigned                        cb_color_control;
        unsigned                        pa_sc_line_stipple;
+       unsigned                        pa_su_sc_mode_cntl;
        /* for saving when using blitter */
        struct pipe_stencil_ref         stencil_ref;
        struct pipe_viewport_state      viewport;

diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index ae9f797..25af1e3 100644 (file)
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -938,6 +938,12 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
                return NULL;
        }
 
+       polygon_dual_mode = (state->fill_front != PIPE_POLYGON_MODE_FILL ||
+                               state->fill_back != PIPE_POLYGON_MODE_FILL);
+
+       if (state->flatshade_first)
+               prov_vtx = 0;
+
        rstate = &rs->rstate;
        rs->flatshade = state->flatshade;
        rs->sprite_coord_enable = state->sprite_coord_enable;
@@ -946,6 +952,17 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
        rs->pa_sc_line_stipple = state->line_stipple_enable ?
                                S_028A0C_LINE_PATTERN(state->line_stipple_pattern) |
                                S_028A0C_REPEAT_COUNT(state->line_stipple_factor) : 0;
+       rs->pa_su_sc_mode_cntl =
+               S_028814_PROVOKING_VTX_LAST(prov_vtx) |
+               S_028814_CULL_FRONT(state->rasterizer_discard || (state->cull_face & PIPE_FACE_FRONT) ? 1 : 0) |
+               S_028814_CULL_BACK(state->rasterizer_discard || (state->cull_face & PIPE_FACE_BACK) ? 1 : 0) |
+               S_028814_FACE(!state->front_ccw) |
+               S_028814_POLY_OFFSET_FRONT_ENABLE(state->offset_tri) |
+               S_028814_POLY_OFFSET_BACK_ENABLE(state->offset_tri) |
+               S_028814_POLY_OFFSET_PARA_ENABLE(state->offset_tri) |
+               S_028814_POLY_MODE(polygon_dual_mode) |
+               S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |
+               S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back));
 
        clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
        /* offset */
@@ -953,8 +970,6 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
        rs->offset_scale = state->offset_scale * 12.0f;
 
        rstate->id = R600_PIPE_STATE_RASTERIZER;
-       if (state->flatshade_first)
-               prov_vtx = 0;
        tmp = S_0286D4_FLAT_SHADE_ENA(1);
        if (state->sprite_coord_enable) {
                tmp |= S_0286D4_PNT_SPRITE_ENA(1) |
@@ -968,19 +983,6 @@ static void *r600_create_rs_state(struct pipe_context *ctx,
        }
        r600_pipe_state_add_reg(rstate, R_0286D4_SPI_INTERP_CONTROL_0, tmp, 0xFFFFFFFF, NULL, 0);
 
-       polygon_dual_mode = (state->fill_front != PIPE_POLYGON_MODE_FILL ||
-                               state->fill_back != PIPE_POLYGON_MODE_FILL);
-       r600_pipe_state_add_reg(rstate, R_028814_PA_SU_SC_MODE_CNTL,
-               S_028814_PROVOKING_VTX_LAST(prov_vtx) |
-               S_028814_CULL_FRONT(state->rasterizer_discard || (state->cull_face & PIPE_FACE_FRONT) ? 1 : 0) |
-               S_028814_CULL_BACK(state->rasterizer_discard || (state->cull_face & PIPE_FACE_BACK) ? 1 : 0) |
-               S_028814_FACE(!state->front_ccw) |
-               S_028814_POLY_OFFSET_FRONT_ENABLE(state->offset_tri) |
-               S_028814_POLY_OFFSET_BACK_ENABLE(state->offset_tri) |
-               S_028814_POLY_OFFSET_PARA_ENABLE(state->offset_tri) |
-               S_028814_POLY_MODE(polygon_dual_mode) |
-               S_028814_POLYMODE_FRONT_PTYPE(r600_translate_fill(state->fill_front)) |
-               S_028814_POLYMODE_BACK_PTYPE(r600_translate_fill(state->fill_back)), 0xFFFFFFFF, NULL, 0);
        r600_pipe_state_add_reg(rstate, R_028820_PA_CL_NANINF_CNTL, 0x00000000, 0xFFFFFFFF, NULL, 0);
        /* point size 12.4 fixed point */
        tmp = (unsigned)(state->point_size * 8.0);

diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 84ccd5e..ec28552 100644 (file)
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -167,6 +167,7 @@ void r600_bind_rs_state(struct pipe_context *ctx, void *state)
        rctx->sprite_coord_enable = rs->sprite_coord_enable;
        rctx->two_side = rs->two_side;
        rctx->pa_sc_line_stipple = rs->pa_sc_line_stipple;
+       rctx->pa_su_sc_mode_cntl = rs->pa_su_sc_mode_cntl;
 
        rctx->rasterizer = rs;
 
@@ -754,9 +755,7 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
                r600_pipe_state_add_reg(&rctx->vgt, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0, 0xFFFFFFFF, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_03CFF4_SQ_VTX_START_INST_LOC, info.start_instance, 0xFFFFFFFF, NULL, 0);
                r600_pipe_state_add_reg(&rctx->vgt, R_028A0C_PA_SC_LINE_STIPPLE, 0, 0xFFFFFFFF, NULL, 0);
-               r600_pipe_state_add_reg(&rctx->vgt, R_028814_PA_SU_SC_MODE_CNTL,
-                                       0,
-                                       S_028814_PROVOKING_VTX_LAST(1), NULL, 0);
+               r600_pipe_state_add_reg(&rctx->vgt, R_028814_PA_SU_SC_MODE_CNTL, 0, 0xFFFFFFFF, NULL, 0);
                if (rctx->chip_class <= R700)
                        r600_pipe_state_add_reg(&rctx->vgt, R_028808_CB_COLOR_CONTROL, rctx->cb_color_control, 0xFFFFFFFF, NULL, 0);
        }
@@ -779,9 +778,9 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
        r600_pipe_state_mod_reg(&rctx->vgt, S_028A0C_AUTO_RESET_CNTL(ls_mask) | rctx->pa_sc_line_stipple);
 
        if (info.mode == PIPE_PRIM_QUADS || info.mode == PIPE_PRIM_QUAD_STRIP || info.mode == PIPE_PRIM_POLYGON) {
-               r600_pipe_state_mod_reg(&rctx->vgt, S_028814_PROVOKING_VTX_LAST(1));
+               r600_pipe_state_mod_reg(&rctx->vgt, S_028814_PROVOKING_VTX_LAST(1) | rctx->pa_su_sc_mode_cntl);
        } else {
-               r600_pipe_state_mod_reg(&rctx->vgt, 0);
+               r600_pipe_state_mod_reg(&rctx->vgt, rctx->pa_su_sc_mode_cntl);
        }
        if (rctx->chip_class <= R700)
                r600_pipe_state_mod_reg(&rctx->vgt, rctx->cb_color_control);