Convert CONFIG_SPL_TARGET to Kconfig
authorTom Rini <trini@konsulko.com>
Fri, 27 May 2022 21:13:52 +0000 (17:13 -0400)
committerTom Rini <trini@konsulko.com>
Mon, 6 Jun 2022 16:09:29 +0000 (12:09 -0400)
This converts the following to Kconfig:
   CONFIG_SPL_TARGET

Signed-off-by: Tom Rini <trini@konsulko.com>
68 files changed:
README
common/spl/Kconfig
configs/P1010RDB-PA_36BIT_NAND_defconfig
configs/P1010RDB-PA_36BIT_SDCARD_defconfig
configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PA_NAND_defconfig
configs/P1010RDB-PA_SDCARD_defconfig
configs/P1010RDB-PA_SPIFLASH_defconfig
configs/P1010RDB-PB_36BIT_NAND_defconfig
configs/P1010RDB-PB_36BIT_SDCARD_defconfig
configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig
configs/P1010RDB-PB_NAND_defconfig
configs/P1010RDB-PB_SDCARD_defconfig
configs/P1010RDB-PB_SPIFLASH_defconfig
configs/P1020RDB-PC_36BIT_NAND_defconfig
configs/P1020RDB-PC_36BIT_SDCARD_defconfig
configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P1020RDB-PC_NAND_defconfig
configs/P1020RDB-PC_SDCARD_defconfig
configs/P1020RDB-PC_SPIFLASH_defconfig
configs/P1020RDB-PD_NAND_defconfig
configs/P1020RDB-PD_SDCARD_defconfig
configs/P1020RDB-PD_SPIFLASH_defconfig
configs/P2020RDB-PC_36BIT_NAND_defconfig
configs/P2020RDB-PC_36BIT_SDCARD_defconfig
configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
configs/P2020RDB-PC_NAND_defconfig
configs/P2020RDB-PC_SDCARD_defconfig
configs/P2020RDB-PC_SPIFLASH_defconfig
configs/k2e_evm_defconfig
configs/k2g_evm_defconfig
configs/k2hk_evm_defconfig
configs/k2l_evm_defconfig
configs/ls1046ardb_qspi_spl_defconfig
configs/ls1088aqds_sdcard_ifc_defconfig
configs/ls1088aqds_sdcard_qspi_defconfig
configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
configs/ls1088ardb_sdcard_qspi_defconfig
configs/ls2080aqds_nand_defconfig
configs/ls2080aqds_sdcard_defconfig
configs/ls2080ardb_nand_defconfig
configs/m53menlo_defconfig
configs/socfpga_agilex_atf_defconfig
configs/socfpga_agilex_defconfig
configs/socfpga_agilex_vab_defconfig
configs/socfpga_n5x_atf_defconfig
configs/socfpga_n5x_defconfig
configs/socfpga_n5x_vab_defconfig
configs/socfpga_stratix10_atf_defconfig
configs/socfpga_stratix10_defconfig
configs/stm32mp15_dhcom_basic_defconfig
configs/stm32mp15_dhcor_basic_defconfig
configs/uniphier_ld4_sld8_defconfig
configs/uniphier_v7_defconfig
include/configs/P1010RDB.h
include/configs/dh_imx6.h
include/configs/ge_b1x5v2.h
include/configs/ls1046a_common.h
include/configs/ls1088a_common.h
include/configs/ls2080a_common.h
include/configs/m53menlo.h
include/configs/p1_p2_rdb_pc.h
include/configs/rcar-gen2-common.h
include/configs/rcar-gen3-common.h
include/configs/socfpga_soc64_common.h
include/configs/stm32mp15_dh_dhsom.h
include/configs/ti_armv7_keystone2.h
include/configs/uniphier.h

diff --git a/README b/README
index 452e595..354913f 100644 (file)
--- a/README
+++ b/README
@@ -1679,11 +1679,6 @@ The following options need to be configured:
                CONFIG_SPL_RAM_DEVICE
                Support for running image already present in ram, in SPL binary
 
-               CONFIG_SPL_TARGET
-               Final target image containing SPL and payload.  Some SPLs
-               use an arch-specific makefile fragment instead, for
-               example if more than one image needs to be produced.
-
                CONFIG_SPL_FIT_PRINT
                Printing information about a FIT image adds quite a bit of
                code to SPL. So this is normally disabled in SPL. Use this
index 027ac42..dfbda1b 100644 (file)
@@ -1583,6 +1583,15 @@ config SPL_OPENSBI_LOAD_ADDR
        help
          Load address of the OpenSBI binary.
 
+config SPL_TARGET
+       string "Addtional build targets for 'make'"
+       default "spl/u-boot-spl.srec" if RCAR_GEN2
+       default "spl/u-boot-spl.scif" if RCAR_GEN3
+       default ""
+       help
+         On some platforms we need to have 'make' run additional build target
+         rules. If required on your platform, enter it here, otherwise leave blank.
+
 config TPL
        bool
        depends on SUPPORT_TPL
index 06b4ca7..6c4142c 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_DRIVERS_MISC=y
index b116eee..324ad90 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index df4caee..2299f45 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index 918a107..5813c75 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_DRIVERS_MISC=y
index 41988bb..a51f9ac 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index b4dd81e..c2b5d77 100644 (file)
@@ -41,6 +41,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index b69e6cf..4caf43d 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_DRIVERS_MISC=y
index 21e4e7f..5005387 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index dbbc25d..6f0cd35 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index c4e9d59..16b5219 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_DRIVERS_MISC=y
index c0ea6b9..6d3be43 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index c32ccc2..a54f7ea 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PBSIZE=276
 CONFIG_CMD_IMLS=y
index 3e5c044..80bfe31 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_ENV_SUPPORT=y
index ddd041c..2619ef0 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 9da0248..e37c74b 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 6a75d6f..8606362 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_ENV_SUPPORT=y
index 4122d1d..c0d78c9 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index cfd42e4..debd83e 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index bd3d7a3..d770fc7 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_ENV_SUPPORT=y
index 43391a9..db484c0 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 0915185..d9d6307 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index c0f6b6d..ac4d457 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_ENV_SUPPORT=y
index b17346f..b2a5a72 100644 (file)
@@ -40,6 +40,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 041179e..42e31b4 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index f3fa869..69ca044 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_TPL_RELOC_MALLOC=y
 CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000
 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_TPL=y
 CONFIG_TPL_MAX_SIZE=0x20000
 CONFIG_TPL_ENV_SUPPORT=y
index ae4b758..621e5b0 100644 (file)
@@ -39,6 +39,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 338bbec..04b10d3 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 # CONFIG_AUTO_COMPLETE is not set
 CONFIG_SYS_PBSIZE=276
index 9423b45..58c8c13 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_SPL_DM_SPI_FLASH=y
 CONFIG_SPL_POWER=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SPL_TARGET="u-boot-spi.gph"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
index 10150f5..b96d1fc 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_NAND_BASE=y
 CONFIG_SPL_POWER=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SPL_TARGET="u-boot-spi.gph"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
index 2a2fb1d..cfe5978 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_SPL_DM_SPI_FLASH=y
 CONFIG_SPL_POWER=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SPL_TARGET="u-boot-spi.gph"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
index 906e104..47d5bd1 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_SPL_DM_SPI_FLASH=y
 CONFIG_SPL_POWER=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x10000
+CONFIG_SPL_TARGET="u-boot-spi.gph"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
 CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=6
index c081b78..2f6b546 100644 (file)
@@ -58,6 +58,7 @@ CONFIG_SPL_NOR_SUPPORT=y
 CONFIG_SPL_OS_BOOT=y
 CONFIG_SYS_OS_BASE=0x40980000
 CONFIG_SPL_WATCHDOG=y
+CONFIG_SPL_TARGET="spl/u-boot-spl.pbl"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_SPL=y
index b2e8132..663aacf 100644 (file)
@@ -53,6 +53,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
index 40306d6..f3e2048 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_GREPENV=y
index bc44ede..5b462a4 100644 (file)
@@ -54,6 +54,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_GREPENV=y
index ad0e583..455fce3 100644 (file)
@@ -55,6 +55,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_GREPENV=y
index 209202d..dab9a7f 100644 (file)
@@ -45,6 +45,7 @@ CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_GREPENV=y
index 0f40fa6..3d6aa69 100644 (file)
@@ -46,6 +46,7 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_GREPENV=y
index f36cf47..9fcc5d6 100644 (file)
@@ -51,6 +51,7 @@ CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_I2C=y
 CONFIG_SPL_MPC8XXX_INIT_DDR=y
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_SYS_MAXARGS=64
 CONFIG_SYS_PBSIZE=532
 CONFIG_CMD_IMLS=y
index 455f196..2ccea83 100644 (file)
@@ -37,6 +37,7 @@ CONFIG_SPL_BOARD_INIT=y
 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 CONFIG_SPL_STACK=0x70004000
 CONFIG_SPL_NAND_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-nand-spl.imx"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_MAXARGS=32
 CONFIG_SYS_CBSIZE=1024
index ebe90ce..e20789a 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
 CONFIG_SYS_MAXARGS=64
index ab85359..7ae2b16 100644 (file)
@@ -37,6 +37,7 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
 CONFIG_SPL_CACHE=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
 CONFIG_SYS_MAXARGS=64
index fa4bedd..539548b 100644 (file)
@@ -44,6 +44,7 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # "
 CONFIG_SYS_MAXARGS=64
index dd0ad36..77d868a 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_N5X # "
 CONFIG_SYS_MAXARGS=64
index f0d41d1..92d6045 100644 (file)
@@ -34,6 +34,7 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
 CONFIG_SPL_CACHE=y
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3c00000
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_N5X # "
 CONFIG_SYS_MAXARGS=64
index f7a827f..d3a9042 100644 (file)
@@ -43,6 +43,7 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_N5X # "
 CONFIG_SYS_MAXARGS=64
index 39ec1b2..e4d8a2e 100644 (file)
@@ -42,6 +42,7 @@ CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x02000000
 CONFIG_SPL_ATF=y
 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
 CONFIG_SYS_MAXARGS=64
index fac82b8..6aff07d 100644 (file)
@@ -38,6 +38,7 @@ CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000
 CONFIG_SYS_SPL_MALLOC_SIZE=0x500000
 CONFIG_SPL_SPI_LOAD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x3C00000
+CONFIG_SPL_TARGET="spl/u-boot-spl-dtb.hex"
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # "
 CONFIG_SYS_MAXARGS=64
index 38f1643..72d2f6e 100644 (file)
@@ -49,6 +49,7 @@ CONFIG_SPL_SPI_FLASH_MTD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_DFU=y
+CONFIG_SPL_TARGET="u-boot.itb"
 CONFIG_SYS_PROMPT="STM32MP> "
 CONFIG_SYS_PBSIZE=1050
 # CONFIG_CMD_ELF is not set
index 869afdf..b16ad4f 100644 (file)
@@ -47,6 +47,7 @@ CONFIG_SPL_SPI_FLASH_MTD=y
 CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
 CONFIG_SPL_USB_GADGET=y
 CONFIG_SPL_DFU=y
+CONFIG_SPL_TARGET="u-boot.itb"
 CONFIG_SYS_PROMPT="STM32MP> "
 CONFIG_SYS_PBSIZE=1050
 # CONFIG_CMD_ELF is not set
index ceb5083..72306ab 100644 (file)
@@ -25,6 +25,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
 CONFIG_SPL_STACK=0x100000
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_NOR_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_CMD_CONFIG=y
 # CONFIG_CMD_XIMG is not set
 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
index a2ea3a9..a448d1c 100644 (file)
@@ -25,6 +25,7 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000
 CONFIG_SPL_STACK=0x100000
 CONFIG_SPL_NAND_SUPPORT=y
 CONFIG_SPL_NOR_SUPPORT=y
+CONFIG_SPL_TARGET="u-boot-with-spl.bin"
 CONFIG_CMD_CONFIG=y
 # CONFIG_CMD_XIMG is not set
 CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=10
index 19ca053..ce63e64 100644 (file)
@@ -16,7 +16,6 @@
 #include <asm/config_mpc85xx.h>
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #define CONFIG_SYS_MMC_U_BOOT_SIZE     (512 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST      (0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_START    (0x11000000)
@@ -29,7 +28,6 @@
 #define CONFIG_RAMBOOT_SPIFLASH
 #define CONFIG_RESET_VECTOR_ADDRESS    0x110bfffc
 #else
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE       (512 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                (0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START      (0x11000000)
@@ -40,8 +38,6 @@
 
 #ifdef CONFIG_MTD_RAW_NAND
 #ifdef CONFIG_NXP_ESBC
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    ((768 << 10) - 0x2000)
 #define CONFIG_SYS_NAND_U_BOOT_DST     (0x00200000 - CONFIG_SPL_MAX_SIZE)
 #define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
@@ -60,7 +56,6 @@
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
 #endif
-#define CONFIG_SPL_TARGET      "u-boot-with-spl.bin"
 #endif
 #endif
 
index d177b45..b495826 100644 (file)
@@ -23,7 +23,6 @@
 
 /* SPL */
 #include "imx6_spl.h"                  /* common IMX6 SPL configuration */
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.imx"
 
 /* Miscellaneous configurable options */
 
index 5a5a5d6..252ab5e 100644 (file)
@@ -13,7 +13,6 @@
 #include "mx6_common.h"
 
 #include "imx6_spl.h"
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.imx"
 
 /* PWM */
 #define CONFIG_IMX6_PWM_PER_CLK                66000000
index c2563b1..8e91035 100644 (file)
@@ -61,7 +61,6 @@
 #endif
 
 #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL)
-#define CONFIG_SPL_TARGET              "spl/u-boot-spl.pbl"
 #define CONFIG_SYS_MONITOR_LEN         0x100000
 #endif
 
index 3ef163d..9a29bb6 100644 (file)
@@ -144,8 +144,6 @@ unsigned long long get_qixis_addr(void);
 #endif
 
 #ifdef CONFIG_SPL
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-
 #ifdef CONFIG_NXP_ESBC
 #define CONFIG_U_BOOT_HDR_SIZE         (16 << 10)
 /*
index 3551a0d..f9eb829 100644 (file)
@@ -137,8 +137,6 @@ unsigned long long get_qixis_addr(void);
        "mcinitcmd=fsl_mc start mc 0x580a00000" \
        " 0x580e00000 \0"
 
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-
 #ifdef CONFIG_NAND_BOOT
 #define CONFIG_SYS_NAND_U_BOOT_DST     0x80400000
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_NAND_U_BOOT_DST
index 433952c..ed44f35 100644 (file)
 /*
  * NAND SPL
  */
-#define CONFIG_SPL_TARGET              "u-boot-with-nand-spl.imx"
 
 #define CONFIG_SYS_NAND_SIZE           (256 * 1024 * 1024)
 
index 24a88ce..f74ad62 100644 (file)
 #endif
 
 #ifdef CONFIG_SDCARD
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #define CONFIG_SYS_MMC_U_BOOT_SIZE     (768 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST      (0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_START    (0x11000000)
 #define CONFIG_SYS_MMC_U_BOOT_OFFS     (128 << 10)
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #elif defined(CONFIG_SPIFLASH)
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE       (768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                (0x11000000)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_START      (0x11000000)
@@ -97,7 +95,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_DST     (0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_START   (0x11000000)
 #elif defined(CONFIG_SPL_BUILD)
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (128 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     0xf8f80000
 #define CONFIG_SYS_NAND_U_BOOT_START   0xf8f80000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
 #endif /* not CONFIG_TPL_BUILD */
-
-#define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
 #endif
 
 #ifndef CONFIG_RESET_VECTOR_ADDRESS
index b4d2a52..2e54211 100644 (file)
 
 #include <asm/arch/rmobile.h>
 
-#ifdef CONFIG_SPL
-#define CONFIG_SPL_TARGET      "spl/u-boot-spl.srec"
-#endif
-
 #ifndef CONFIG_PINCTRL_PFC
 #define CONFIG_SH_GPIO_PFC
 #endif
index ee9fc28..e80e45d 100644 (file)
 
 #include <asm/arch/rmobile.h>
 
-#ifdef CONFIG_SPL
-#define CONFIG_SPL_TARGET      "spl/u-boot-spl.scif"
-#endif
-
 /* boot option */
 
 /* Generic Interrupt Controller Definitions */
index cbc1806..b71f8ba 100644 (file)
@@ -143,6 +143,5 @@ unsigned int cm_get_l4_sys_free_clk_hz(void);
  * 0x8000_0000 ...... End of SDRAM_1 (assume 2GB)
  *
  */
-#define CONFIG_SPL_TARGET              "spl/u-boot-spl-dtb.hex"
 
 #endif /* __CONFIG_SOCFPGA_SOC64_COMMON_H__ */
index bb95480..910d7ef 100644 (file)
@@ -33,6 +33,4 @@
 
 #include <configs/stm32mp15_common.h>
 
-#define CONFIG_SPL_TARGET              "u-boot.itb"
-
 #endif
index 0609696..7fd7995 100644 (file)
@@ -12,7 +12,6 @@
 /* U-Boot Build Configuration */
 
 /* SoC Configuration */
-#define CONFIG_SPL_TARGET              "u-boot-spi.gph"
 
 /* Memory Configuration */
 #define CONFIG_SYS_LPAE_SDRAM_BASE     0x800000000
index 6493569..2bb9e59 100644 (file)
 /* subtract sizeof(struct image_header) */
 #define CONFIG_SYS_UBOOT_BASE                  (0x130000 - 0x40)
 
-#define CONFIG_SPL_TARGET                      "u-boot-with-spl.bin"
-
 #endif /* __CONFIG_UNIPHIER_H__ */