PCI: cadence: Configure LM_EP_FUNC_CFG based on epc->function_num_map
authorKishon Vijay Abraham I <kishon@ti.com>
Mon, 1 Feb 2021 19:58:04 +0000 (01:28 +0530)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 23 Feb 2021 20:12:18 +0000 (14:12 -0600)
The number of functions supported by the endpoint controller is configured
in LM_EP_FUNC_CFG based on func_no member of struct pci_epf.  Now that an
endpoint function can be associated with two endpoint controllers (primary
and secondary), just using func_no will not suffice as that will take into
account only if the endpoint controller is associated with the primary
interface of endpoint function. Instead use epc->function_num_map which
will already have the configured functions information (irrespective of
whether the endpoint controller is associated with primary or secondary
interface).

Link: https://lore.kernel.org/r/20210201195809.7342-13-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Tom Joseph <tjoseph@cadence.com>
drivers/pci/controller/cadence/pcie-cadence-ep.c

index dc88078..897cdde 100644 (file)
@@ -506,18 +506,13 @@ static int cdns_pcie_ep_start(struct pci_epc *epc)
        struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
        struct cdns_pcie *pcie = &ep->pcie;
        struct device *dev = pcie->dev;
-       struct pci_epf *epf;
-       u32 cfg;
        int ret;
 
        /*
         * BIT(0) is hardwired to 1, hence function 0 is always enabled
         * and can't be disabled anyway.
         */
-       cfg = BIT(0);
-       list_for_each_entry(epf, &epc->pci_epf, list)
-               cfg |= BIT(epf->func_no);
-       cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, cfg);
+       cdns_pcie_writel(pcie, CDNS_PCIE_LM_EP_FUNC_CFG, epc->function_num_map);
 
        ret = cdns_pcie_start_link(pcie);
        if (ret) {