MIPS: Add basic support for the TL-WR1043ND version 1

Add a DTS for TL-WR1043ND version 1 and allow to have it built in the
kernel to circumvent the broken u-boot found on these boards.
Currently only the UART, LEDs and buttons are supported.

Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/ath79/Kconfig b/arch/mips/ath79/Kconfig
index dfc6020..13c04cf 100644 (file)
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -71,6 +71,18 @@ config ATH79_MACH_UBNT_XM
          Say 'Y' here if you want your kernel to support the
          Ubiquiti Networks XM (rev 1.0) board.
 
+choice
+       prompt "Build a DTB in the kernel"
+       optional
+       help
+         Select a devicetree that should be built into the kernel.
+
+       config DTB_TL_WR1043ND_V1
+               bool "TL-WR1043ND Version 1"
+               select BUILTIN_DTB
+               select SOC_AR913X
+endchoice
+
 endmenu
 
 config SOC_AR71XX

diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile
index 9c31b30..778a340 100644 (file)
--- a/arch/mips/boot/dts/Makefile
+++ b/arch/mips/boot/dts/Makefile
@@ -4,6 +4,7 @@ dts-dirs        += ingenic
 dts-dirs       += lantiq
 dts-dirs       += mti
 dts-dirs       += netlogic
+dts-dirs       += qca
 dts-dirs       += ralink
 
 obj-y          := $(addsuffix /, $(dts-dirs))

diff --git a/arch/mips/boot/dts/qca/Makefile b/arch/mips/boot/dts/qca/Makefile
new file mode 100644 (file)
index 0000000..2d61455
--- /dev/null
+++ b/arch/mips/boot/dts/qca/Makefile
@@ -0,0 +1,11 @@
+# All DTBs
+dtb-$(CONFIG_ATH79)                    += ar9132_tl_wr1043nd_v1.dtb
+
+# Select a DTB to build in the kernel
+obj-$(CONFIG_DTB_TL_WR1043ND_V1)       += ar9132_tl_wr1043nd_v1.dtb.o
+
+# Force kbuild to make empty built-in.o if necessary
+obj-                           += dummy.o
+
+always                         := $(dtb-y)
+clean-files                    := *.dtb *.dtb.S

diff --git a/arch/mips/boot/dts/qca/ar9132.dtsi b/arch/mips/boot/dts/qca/ar9132.dtsi
new file mode 100644 (file)
index 0000000..4759cff
--- /dev/null
+++ b/arch/mips/boot/dts/qca/ar9132.dtsi
@@ -0,0 +1,133 @@
+/ {
+       compatible = "qca,ar9132";
+
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "mips,mips24Kc";
+                       reg = <0>;
+               };
+       };
+
+       cpuintc: interrupt-controller {
+               compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
+
+               interrupt-controller;
+               #interrupt-cells = <1>;
+
+               qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
+               qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
+                                       <&ddr_ctrl 0>, <&ddr_ctrl 1>;
+       };
+
+       ahb {
+               compatible = "simple-bus";
+               ranges;
+
+               #address-cells = <1>;
+               #size-cells = <1>;
+
+               interrupt-parent = <&cpuintc>;
+
+               apb {
+                       compatible = "simple-bus";
+                       ranges;
+
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       interrupt-parent = <&miscintc>;
+
+                       ddr_ctrl: memory-controller@18000000 {
+                               compatible = "qca,ar9132-ddr-controller",
+                                               "qca,ar7240-ddr-controller";
+                               reg = <0x18000000 0x100>;
+
+                               #qca,ddr-wb-channel-cells = <1>;
+                       };
+
+                       uart@18020000 {
+                               compatible = "ns8250";
+                               reg = <0x18020000 0x20>;
+                               interrupts = <3>;
+
+                               clocks = <&pll 2>;
+                               clock-names = "uart";
+
+                               reg-io-width = <4>;
+                               reg-shift = <2>;
+                               no-loopback-test;
+
+                               status = "disabled";
+                       };
+
+                       gpio: gpio@18040000 {
+                               compatible = "qca,ar9132-gpio",
+                                               "qca,ar7100-gpio";
+                               reg = <0x18040000 0x30>;
+                               interrupts = <2>;
+
+                               ngpios = <22>;
+
+                               gpio-controller;
+                               #gpio-cells = <2>;
+
+                               interrupt-controller;
+                               #interrupt-cells = <2>;
+                       };
+
+                       pll: pll-controller@18050000 {
+                               compatible = "qca,ar9132-ppl",
+                                               "qca,ar9130-pll";
+                               reg = <0x18050000 0x20>;
+
+                               clock-names = "ref";
+                               /* The board must provides the ref clock */
+
+                               #clock-cells = <1>;
+                               clock-output-names = "cpu", "ddr", "ahb";
+                       };
+
+                       wdt@18060008 {
+                               compatible = "qca,ar7130-wdt";
+                               reg = <0x18060008 0x8>;
+
+                               interrupts = <4>;
+
+                               clocks = <&pll 2>;
+                               clock-names = "wdt";
+                       };
+
+                       miscintc: interrupt-controller@18060010 {
+                               compatible = "qca,ar9132-misc-intc",
+                                          "qca,ar7100-misc-intc";
+                               reg = <0x18060010 0x4>;
+
+                               interrupt-parent = <&cpuintc>;
+                               interrupts = <6>;
+
+                               interrupt-controller;
+                               #interrupt-cells = <1>;
+                       };
+               };
+
+               spi@1f000000 {
+                       compatible = "qca,ar9132-spi", "qca,ar7100-spi";
+                       reg = <0x1f000000 0x10>;
+
+                       clocks = <&pll 2>;
+                       clock-names = "ahb";
+
+                       status = "disabled";
+
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+};

diff --git a/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts b/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts
new file mode 100644 (file)
index 0000000..003015a
--- /dev/null
+++ b/arch/mips/boot/dts/qca/ar9132_tl_wr1043nd_v1.dts
@@ -0,0 +1,112 @@
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+#include "ar9132.dtsi"
+
+/ {
+       compatible = "tplink,tl-wr1043nd-v1", "qca,ar9132";
+       model = "TP-Link TL-WR1043ND Version 1";
+
+       alias {
+               serial0 = "/ahb/apb/uart@18020000";
+       };
+
+       memory@0 {
+               device_type = "memory";
+               reg = <0x0 0x2000000>;
+       };
+
+       extosc: oscillator {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <40000000>;
+       };
+
+       ahb {
+               apb {
+                       uart@18020000 {
+                               status = "okay";
+                       };
+
+                       pll-controller@18050000 {
+                               clocks = <&extosc>;
+                       };
+               };
+
+               spi@1f000000 {
+                       status = "okay";
+                       num-cs = <1>;
+
+                       flash@0 {
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               compatible = "s25sl064a";
+                               reg = <0>;
+                               spi-max-frequency = <25000000>;
+
+                               partition@0 {
+                                       label = "u-boot";
+                                       reg = <0x000000 0x020000>;
+                               };
+
+                               partition@1 {
+                                       label = "firmware";
+                                       reg = <0x020000 0x7D0000>;
+                               };
+
+                               partition@2 {
+                                       label = "art";
+                                       reg = <0x7F0000 0x010000>;
+                                       read-only;
+                               };
+                       };
+               };
+       };
+
+       gpio-keys {
+               compatible = "gpio-keys-polled";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               poll-interval = <20>;
+               button@0 {
+                       label = "reset";
+                       linux,code = <KEY_RESTART>;
+                       gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
+                       debounce-interval = <60>;
+               };
+
+               button@1 {
+                       label = "qss";
+                       linux,code = <KEY_WPS_BUTTON>;
+                       gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
+                       debounce-interval = <60>;
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+               led@0 {
+                       label = "tp-link:green:usb";
+                       gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
+               };
+
+               led@1 {
+                       label = "tp-link:green:system";
+                       gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "heartbeat";
+               };
+
+               led@2 {
+                       label = "tp-link:green:qss";
+                       gpios = <&gpio 5 GPIO_ACTIVE_HIGH>;
+               };
+
+               led@3 {
+                       label = "tp-link:green:wlan";
+                       gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
+               };
+       };
+};