spi: zynqmp_gqspi: Update tapdelay value
authorT Karthik Reddy <t.karthik.reddy@xilinx.com>
Wed, 23 Nov 2022 09:04:51 +0000 (02:04 -0700)
committerMichal Simek <michal.simek@amd.com>
Mon, 5 Dec 2022 07:55:54 +0000 (08:55 +0100)
The driver was using an incorrect value for GQSPI_LPBK_DLY_ADJ_DLY_1
tapdelay for Versal for frequencies above 100MHz. Change it from 2 to 1
based on the recommended value in IP spec.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20221123090451.11409-1-ashok.reddy.soma@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
drivers/spi/zynqmp_gqspi.c

index 48eff777dfb399801715da52acf1f50bac3f45a7..83a5c8aebfcf5ee0ba995a4924aac496d664cb86 100644 (file)
@@ -94,7 +94,7 @@
 
 #define GQSPI_BAUD_DIV_SHIFT           2
 #define GQSPI_LPBK_DLY_ADJ_LPBK_SHIFT  5
-#define GQSPI_LPBK_DLY_ADJ_DLY_1       0x2
+#define GQSPI_LPBK_DLY_ADJ_DLY_1       0x1
 #define GQSPI_LPBK_DLY_ADJ_DLY_1_SHIFT 3
 #define GQSPI_LPBK_DLY_ADJ_DLY_0       0x3
 #define GQSPI_USE_DATA_DLY             0x1