asahi: Identify more depth pipeline fields
authorAlyssa Rosenzweig <alyssa@rosenzweig.io>
Sat, 2 Apr 2022 17:22:04 +0000 (13:22 -0400)
committerAlyssa Rosenzweig <alyssa@rosenzweig.io>
Sun, 22 May 2022 21:09:00 +0000 (17:09 -0400)
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16512>

src/asahi/lib/cmdbuf.xml
src/asahi/lib/decode.c
src/gallium/drivers/asahi/magic.c

index 6141325..4255b73 100644 (file)
     <field name="Unk 3" start="6:0" size="32" type="hex" default="0xffffffff"/>
     <field name="Unk 4" start="7:0" size="32" type="hex" default="0xffffffff"/>
     <field name="Unk 5" start="8:0" size="32" type="hex" default="0xffffffff"/>
-    <field name="Unk 20" start="20:0" size="32" type="hex" default="0xffff8212"/>
-    <field name="Unk pipeline" start="22:0" size="32" type="address"/>
-    <field name="Unk 28" start="28:0" size="32" type="hex" default="0x12"/>
-    <field name="Unk pipeline 2" start="30:0" size="32" type="hex" default="0x12"/>
+    <field name="Depth clear pipeline bind" start="20:0" size="32" type="hex"/>
+    <field name="Depth clear pipeline unk" start="22:0" size="4" default="4" type="hex"/>
+    <field name="Depth clear pipeline" start="22:4" size="28" type="address" modifier="shr(4)"/>
+    <field name="Depth store pipeline bind" start="28:0" size="32" type="hex"/>
+    <field name="Depth store pipeline unk" start="30:0" size="4" default="4" type="hex"/>
+    <field name="Depth store pipeline" start="30:4" size="28" type="address" modifier="shr(4)"/>
   </struct>
 
   <struct name="IOGPU Misc" size="288">
index f82659e..7547715 100644 (file)
@@ -444,7 +444,10 @@ agxdecode_cmdstream(unsigned cmdbuf_handle, unsigned map_handle, bool verbose)
 
    DUMP_CL(IOGPU_INTERNAL_PIPELINES, ((uint32_t *) cmdbuf->ptr.cpu) + 160, "Internal pipelines");
    DUMP_CL(IOGPU_AUX_FRAMEBUFFER, ((uint32_t *) cmdbuf->ptr.cpu) + 228, "Aux Framebuffer");
-   DUMP_CL(IOGPU_CLEAR_Z_S, ((uint32_t *) cmdbuf->ptr.cpu) + 292, "Clear Z/S");
+
+   agx_unpack(agxdecode_dump_stream, ((uint32_t *) cmdbuf->ptr.cpu) + 292,
+         IOGPU_CLEAR_Z_S, clearzs);
+   DUMP_UNPACKED(IOGPU_CLEAR_Z_S, clearzs, "Clear Z/S");
 
    /* Guard against changes */
    uint32_t zeroes[356 - 344] = { 0 };
@@ -484,6 +487,17 @@ agxdecode_cmdstream(unsigned cmdbuf_handle, unsigned map_handle, bool verbose)
             agxdecode_pipeline, verbose);
    }
 
+   assert((clearzs.depth_clear_pipeline_unk & 0xF) == 0x4);
+   if (clearzs.depth_clear_pipeline) {
+      agxdecode_stateful(clearzs.depth_clear_pipeline,
+            "Depth clear pipeline", agxdecode_pipeline, verbose);
+   }
+
+   if (clearzs.depth_store_pipeline) {
+      agxdecode_stateful(clearzs.depth_store_pipeline,
+            "Depth store pipeline", agxdecode_pipeline, verbose);
+   }
+
    agxdecode_map_read_write();
 }
 
index 8a6721b..3e1e07b 100644 (file)
@@ -229,8 +229,12 @@ demo_cmdbuf(uint64_t *buf, size_t size,
    agx_pack(map + 292, IOGPU_CLEAR_Z_S, cfg) {
       cfg.depth_clear_value = fui(clear_depth);
       cfg.stencil_clear_value = clear_stencil;
-      cfg.unk_pipeline = pipeline_null | 0x4;
-      cfg.unk_pipeline_2 = pipeline_store | 0x4;
+
+      cfg.depth_clear_pipeline_bind = 0xffff8002 | (clear_pipeline_textures ? 0x210 : 0);
+      cfg.depth_clear_pipeline = pipeline_null;
+
+      cfg.depth_store_pipeline_bind = 0x12;
+      cfg.depth_store_pipeline = pipeline_store;
    }
 
    agx_pack(map + 356, IOGPU_MISC, cfg) {