dt-bindings: display: Add Document for Rockchip Soc LVDS
authorSandy Huang <hjc@rock-chips.com>
Sat, 2 Sep 2017 11:28:47 +0000 (19:28 +0800)
committerMark Yao <mark.yao@rock-chips.com>
Fri, 8 Sep 2017 06:54:35 +0000 (14:54 +0800)
This patch add Document for Rockchip Soc RK3288 LVDS,
This based on the patches from Mark yao and Heiko Stuebner.

Signed-off-by: Mark yao <mark.yao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Reviewed-by: Mark Yao <mark.yao@rock-chips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://patchwork.freedesktop.org/patch/msgid/1504351729-135932-1-git-send-email-hjc@rock-chips.com
Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt
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+Rockchip RK3288 LVDS interface
+================================
+
+Required properties:
+- compatible: matching the soc type, one of
+       - "rockchip,rk3288-lvds";
+
+- reg: physical base address of the controller and length
+       of memory mapped region.
+- clocks: must include clock specifiers corresponding to entries in the
+       clock-names property.
+- clock-names: must contain "pclk_lvds"
+
+- avdd1v0-supply: regulator phandle for 1.0V analog power
+- avdd1v8-supply: regulator phandle for 1.8V analog power
+- avdd3v3-supply: regulator phandle for 3.3V analog power
+
+- rockchip,grf: phandle to the general register files syscon
+- rockchip,output: "rgb", "lvds" or "duallvds", This describes the output interface
+
+Optional properties:
+- pinctrl-names: must contain a "lcdc" entry.
+- pinctrl-0: pin control group to be used for this controller.
+
+Required nodes:
+
+The lvds has two video ports as described by
+       Documentation/devicetree/bindings/media/video-interfaces.txt
+Their connections are modeled using the OF graph bindings specified in
+       Documentation/devicetree/bindings/graph.txt.
+
+- video port 0 for the VOP input, the remote endpoint maybe vopb or vopl
+- video port 1 for either a panel or subsequent encoder
+
+the lvds panel described by
+       Documentation/devicetree/bindings/display/panel/simple-panel.txt
+
+Panel required properties:
+- ports for remote LVDS output
+
+Panel optional properties:
+- data-mapping: should be "vesa-24","jeida-24" or "jeida-18".
+This describes decribed by:
+       Documentation/devicetree/bindings/display/panel/panel-lvds.txt
+
+Example:
+
+lvds_panel: lvds-panel {
+       compatible = "auo,b101ean01";
+       enable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>;
+       data-mapping = "jeida-24";
+
+       ports {
+               panel_in_lvds: endpoint {
+                       remote-endpoint = <&lvds_out_panel>;
+               };
+       };
+};
+
+For Rockchip RK3288:
+
+       lvds: lvds@ff96c000 {
+               compatible = "rockchip,rk3288-lvds";
+               rockchip,grf = <&grf>;
+               reg = <0xff96c000 0x4000>;
+               clocks = <&cru PCLK_LVDS_PHY>;
+               clock-names = "pclk_lvds";
+               pinctrl-names = "lcdc";
+               pinctrl-0 = <&lcdc_ctl>;
+               avdd1v0-supply = <&vdd10_lcd>;
+               avdd1v8-supply = <&vcc18_lcd>;
+               avdd3v3-supply = <&vcca_33>;
+               rockchip,output = "rgb";
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       lvds_in: port@0 {
+                               reg = <0>;
+
+                               lvds_in_vopb: endpoint@0 {
+                                       reg = <0>;
+                                       remote-endpoint = <&vopb_out_lvds>;
+                               };
+                               lvds_in_vopl: endpoint@1 {
+                                       reg = <1>;
+                                       remote-endpoint = <&vopl_out_lvds>;
+                               };
+                       };
+
+                       lvds_out: port@1 {
+                               reg = <1>;
+
+                               lvds_out_panel: endpoint {
+                                       remote-endpoint = <&panel_in_lvds>;
+                               };
+                       };
+               };
+       };