struct regulator *vdda_dac_reg;
struct clk *tv_dac_clk;
+
+ struct omap_video_timings timings;
} venc;
static inline void venc_write_reg(int idx, u32 val)
goto err0;
venc_reset();
- venc_write_config(venc_timings_to_config(&dssdev->panel.timings));
+ venc_write_config(venc_timings_to_config(&venc.timings));
dss_set_venc_output(dssdev->phy.venc.type);
dss_set_dac_pwrdn_bgz(1);
venc_write_reg(VENC_OUTPUT_CONTROL, l);
- dss_mgr_set_timings(dssdev->manager, &dssdev->panel.timings);
+ dss_mgr_set_timings(dssdev->manager, &venc.timings);
r = regulator_enable(venc.vdda_dac_reg);
if (r)
mutex_lock(&venc.venc_lock);
/* Reset WSS data when the TV standard changes. */
- if (memcmp(&dssdev->panel.timings, timings, sizeof(*timings)))
+ if (memcmp(&venc.timings, timings, sizeof(*timings)))
venc.wss_data = 0;
- dssdev->panel.timings = *timings;
+ venc.timings = *timings;
if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
int r;
mutex_lock(&venc.venc_lock);
- config = venc_timings_to_config(&dssdev->panel.timings);
+ config = venc_timings_to_config(&venc.timings);
/* Invert due to VENC_L21_WC_CTL:INV=1 */
venc.wss_data = (wss ^ 0xfffff) << 8;
goto err;
}
+ omapdss_venc_set_timings(dssdev, &dssdev->panel.timings);
+
r = omapdss_venc_display_enable(dssdev);
if (r)
goto err;
mutex_lock(&venc_panel.lock);
omapdss_venc_set_timings(dssdev, timings);
+ dssdev->panel.timings = *timings;
mutex_unlock(&venc_panel.lock);
}